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TM4C1290NCPDT: porting from AT91R40008 what is a FIQ pin alternative

d t
Prodigy 70 points
Part Number: TM4C1290NCPDT

I am porting a legacy design to the TM4c129, it has a major piece of code that runs when the FIQ pin is asserted and communicate across the Extended peripheral interface. This must operate uninterrupted, can I switch to FIQ mode, with as little jitter and latency as possible. The main task will use information from this to calculate results for other ports later. 

Is the NMI pin a viable option? I'd think this would cause more issues than I'd like.

Is setting the priority higher that all interrupts other than faults enough?

Is there any way to externally trigger FIQ mode reliably?

  • +1
    TI__Guru**** 190536 points

    Hi,

     Reading AT91R40008 d/s, it is based on a ARM7 core which is quite old. The Cortex-M core in TM4C has a fast interrupt response/latency due to its interrupt architecture. Ex. interrupt tail-chaining and automatically stacks it state on exception entry and unstacks on exception exit - meaning there is no software instructions to push and pop the stacks. NMI will be the next highest exception after reset. NMI will definitely be a viable option if you want to preempt all other exceptions.