AM2432: Inbound and outbound

Hello He He,

We have an extensive chapter in the AM243x Technical Reference Manual on PCIe: https://www.ti.com/lit/ug/spruim2f/spruim2f.pdf#page=5983

Chapters include 12.2.2.4.7.1 PCIe Inbound Address Translation and 12.2.2.4.7.2 PCIe Outbound Address Translation.

If that does not cover the specific details you are needing, then please clarify what information is missing.

Best Regards,

Ralph Jacobi

thanks， 

For an Ep device of inbound , I don't know how to configure these specific addresses, what is the base address, what is the target address?

What specific steps should I follow if I want to change these addresses？

Hello HE,

Sorry that you have not gotten a reply on your follow-up question yet. I had requested another expert to help with this query as it's beyond my knowledge. I apologize for the lack of communication on our end. Let me try and follow-up regarding this with our team.

Best Regards,

Ralph Jacobi

Excuse me, how's it going

Hi HE,

I found the following resource for a similar family of devices. While the peripherals aren't identical, the core concepts of using PCIe are the same: http://www.ti.com/litv/pdf/sprugs6d

There's a whole section on Address Translation and from my read through, it's not very device specific as much as about the protocol so everything should be relevant for AM24x as well.

Best Regards,

Ralph Jacobi

Hi Ralph,

Thank you very much. 

I received the inquiry from this customer too. 

Would you please give him some suggestion about PCIe inbound address?

In the pcie_buf_transfer_ep_am243x-evm_r5fss0-0_nortos_ti-arm-clang demo, what is the address 0x70000000 in syscfg? Is it PCIe address?




Thanks
Regards
Shine

Hello Shine,

I'll add that to the outstanding queries I have regarding the PCIe inbound/outbound addresses.

Best Regards,

Ralph Jacobi

Hi Shine,

Sorry for the delay in the response. Digging further on your question, the address space 0x70000000 is corresponding to MSRAM_256K0_RAM in the Table 2-1 of TRM. My understanding is that the ATU space is mapped to this RAM in the PCIe example you pointed out.  I believe this address can vary based on the implementation of the software. Please let me know if this answers your question. 

Thank you,

Anita