[FAQ] AM2634: How to configure Watchdog (WDG) in MCAL?

According to the AM26/273x TRM the formula to calculate the Expiry time (Texp) is as follows 

RTI_DWDPRLD  → Digital Watchdog Preload Value
RTI_FCLK → Input clock frequency of the WDG peripheral

In this article, consider an expiry time of 1 second is required and all the calculations below are performed pertaining to the same. Typically WDG is clocked with the SysClk i.e., 200MHz. However there is limitation in the formula that the DWDPRLD (Digital Window Pre-load value) cannot be more than 4095. So the RTI_FCLK has to be adjusted to match the preload value to be less than 4095.

To match the1 second expiry time a 20MHz clock frequency for WDG is used and below calculation is performed

Texp = 1 second, RTI_FCLK = 20MHz

RTI_DWDPRLD = (20 *10^6 / 2^13) - 1

                        = (20 * 10^6/8192) -1
                        = 2440.

Now coming to how to configure the above values in the MCAL software please check the snaps below

1. Configure the below Mcu_ClockDiv value of WDT0 from 0 to 9 (This will change the divider value to 10 (internally a +1 is added)) which means 200MHz/(9+1) = 20Mhz is achieved. An additional parameter to consider while configuring the Clock divider is that, the maximum clock divider that can be configured as per the Hardware specifications is only 15 (0x0 to 0xF). If the requirement of the clock is still not matching after dividing the clock to the maximum too, consider changing the clock source directly to a slower clock (typically XTAL CLK - 25MHz) rather than changing the clock divider.

2. In the Wdg_PBCfg.c configure the preload value to be 2440 and launch the wdg_app example. Observe that the wdg is triggerred only every 1 second.

Observations:

Adding a GPIO toggle to verify the WDG expiry, ~1second GPIO toggle.

Thanks