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AM335x SPI Interface delay

Other Parts Discussed in Thread: AM3359

In my case the sitara (AM3359) processor is used as an SPI master an gets data from a SPI slave inerface.

In this data line we have differential RS485 driver and also digital isolators, which means that the date from the slave comes back with a delay.

Now I search a possibility to adjust on sitara side a delay for the read back line (MISO).

  • Hello Juergen Trescher

    Thank you for the query.

    Could you please write a block diagram and provide some additional inputs regarding the clock speed and delay you are expecting.

    I cant think of a quick answer that i could provide and hence looking for additional details.

    Regards,

    Sreenivasa