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TM4C1294NCPDT: "Peek" at DMA Buffer?

Part Number: TM4C1294NCPDT

Hi, I'm using DMA with UART RX on the TM4C1294NCPDT at a baud rate of 230400.  The chunks of key/value delimited data I receive is of variable size and in no predictable order.  Sometimes the key/value pair I receive is as short as just a few bytes and other times it's as long as 50 to 60 bytes.

I'm using DMA in ping-pong mode where the primary and alternate buffers are each 64 bytes.  However, I need to process the key/value data as quickly as possible, preferably, as soon as I get each key/value pair I would like to process it.  Of course, if I happen to receive a series of key/value pairs where each is only a few bytes long, it will take many key/value pairs before the 64 byte DMA buffer is full, substantially delaying how quickly I can process the earlier key/value pairs.

I was hoping there is some way to "peek" into the current DMA buffer being populated before it is entirely populated and process any existing key/value pairs available, however, after reviewing chapter 9 of the "Tiva TM4C1294NCPDT Microcontroller" data sheet in great detail, I'm not seeing a way to reliably "peek" into the DMA buffer before it's complete.

What I really need to know is where the current DMA write pointer is pointing to for the next RX byte received, but I'm not seeing that this is available.

Is this in fact not available or am I missing something?

  • Hi Terence,

    I'm using DMA in ping-pong mode where the primary and alternate buffers are each 64 bytes.  However, I need to process the key/value data as quickly as possible, preferably, as soon as I get each key/value pair I would like to process it.  Of course, if I happen to receive a series of key/value pairs where each is only a few bytes long, it will take many key/value pairs before the 64 byte DMA buffer is full, substantially delaying how quickly I can process the earlier key/value pairs.

    The purpose of the ping-pong mode is to allow you to process the incoming data from one buffer while subsequent data is diverted to another buffer. I understand that it will take many key/value pairs before the 64 byte is filled in DMA buffer but that should be your worst case that you need to take into account for your application. If your application cannot tolerate this then you would need to decrease the buffer size. But decreasing the buffer size may run into a different problem where you take longer time to process one buffer before the next buffer is filled since your UART is receiving data quite fast at 230400. 

    I was hoping there is some way to "peek" into the current DMA buffer being populated before it is entirely populated and process any existing key/value pairs available, however, after reviewing chapter 9 of the "Tiva TM4C1294NCPDT Microcontroller" data sheet in great detail, I'm not seeing a way to reliably "peek" into the DMA buffer before it's complete.

    What I really need to know is where the current DMA write pointer is pointing to for the next RX byte received, but I'm not seeing that this is available.

    No, the write/read data pointer is not something memory-mapped and there is no capability to peek at the intermediate states of uDMA. Only the interrupt will give an indication that a transfer is complete. 

  • Thank you for the quick and informative reply.