AM2634-Q1: FIFO-clear register needs delay

Will Gao

Intellectual 2335 points

Part Number: AM2634-Q1

Hello, BU,

in TRM, it said that the driver should add delay time when set FIFO_CLEAR bit-field.

But in our MCU+ SDK, it is not done:

Why? and what is the effect if not doing so.

Regards,

Will

over 2 years ago

0 Will Gao over 2 years ago

TI__Intellectual 2335 points

Hi BU,

Please give your comments. Thanks.

0 Ashwin Raj over 2 years ago in reply to Will Gao

TI__Intellectual 2425 points

Hi Will,

This seems to be an issue in the driver and have filed a bug for the same. Without this delay, the subsequent code might misbehave since FIFO and related registers might not be reset.

Regards,

Ashwin

0 Will Gao over 2 years ago in reply to Ashwin Raj

TI__Intellectual 2335 points

Hi Ashwin,

thanks for the help.

0 Ashwin Raj over 2 years ago in reply to Will Gao

TI__Intellectual 2425 points

Hi Will,

Below is the bug ticket for the same:

[MCUSDK-11247] UART: Delay missing after setting FIFO CLEAR bit - Texas Instruments JIRA

Regards,

Ashwin

Arm-based microcontrollers

Arm-based microcontrollers forum

AM2634-Q1: FIFO-clear register needs delay