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LP-AM243: CCS debug issues with DAP accessing spare cores for Sitara device (am263x, amd243x)

Sen Wang
Intellectual 2326 points

Part Number: LP-AM243

Hi, I'm having the following error when I'm trying to debug the am263_cc & am243_lp device, the debug initialization process was stuck in CPU soft reset through GEL:

Error connecting to the target:
(Error -1170 @ 0x0)
Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK).

The code (and examples in SDK that I tried) are tailored towards the R5F cores, and I wasn't using the other M4/M3 cores from am263/am243. The error was complaining about the unused M4/M3 cores in default debug settings, R5F cores worked just fine.

I tried to mark the M4/M3 as bypassed in targetConfig, in which debug console initializes without errors, but it would not start my program or the provided examples in SDK. 

Is there anything that can be done to fix or mitigate the issue? I was using the default debug settings, with no modification to the .ccxml or GEL files.

Best,

Sen Wang

  • +1
    TI__Guru 57675 points

    Hi Sen,

    What boot mode are you using? 

    For AM243x and AM263x, you will need to initialize the SoC before connecting to its cores. There two ways for initialize the SoC. Please refer to the following URL for details:

    For AM243x: AM243x MCU+ SDK: EVM Setup (ti.com)

    For AM263x: AM263x MCU+ SDK: CCS Launch, Load and Run (ti.com)

    Best regards,

    Ming

  • 0 in reply to Ming Wei
    TI__Intellectual 2326 points

    Hi Ming,thanks for your response!

    I'm using the QSPI boot mode configuration. But just to make sure, I also went back to the UART mode per instruction and flashed the sbl_null via UART. And it's still acting up on M4/M3 cores once I switched back to QSPI. Interestingly though it does seem like program is running in the background as I do receive the UART messages from the hello world example (R5F cores is running), just that I couldn't debug it.

    I also tried out loading load_dmsc.js in NO_BOOT mode for am243_lp, but the problem with connecting to M3 came up again.

    Connecting to DMSC_Cortex_M3_0!
Error connecting to the target: Timed out after 200000ms (C:\ti\mcu_plus_sdk_am243x_08_06_00_45\tools\ccs_load\am243x\load_dmsc.js#132)

    I'm really not sure if I'm facing a software or a hardware issue, but I guess is there a way I can still be able to see the debug view (code trace, breakpoints etc) with M4/M3 cores disabled?

    Best,

    Sen Wang

  • +1 in reply to Sen Wang
    TI__Guru 57675 points

    Hi Sen,

    For re-flash the OSPI flash via UART, you need to use the default_sbl_null_hsfs.cfg to flash the sbl_ospi.debug.hs_fs.tiimage, because it is a HS-FS device.

    For using CCS with No boot mode, you need to use the load_dmsc_hsfs.js instead of load_dmsc.js.

    Best regards,

    Ming

  • 0 in reply to Ming Wei
    TI__Intellectual 2326 points

    Hi Ming,

    Thank you so much Ming, that worked for AM243x_lp when I flashed the hs_fs version of it. I still have to turn off the M3 core but I did get a debug view now. AM263x_cc also work after a little bit of tinkering and disabling the M4 core.


    Afterall, it seemed like a combination of software and hardware issue, but thank you so much for your support! Your help is greatly appreciated.

    Best,

    Sen Wang