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MSPM0L1304: MSPM0 DMA with PWM concept

Part Number: MSPM0L1304

Hi, 

My customer is using DMA to set duty of PWM.

He needs 3ch PWM and this requires 3ch DMA.

However, MSPM0 only supports 1 full-feature channel (DMA0), supporting repeated transfer modes.

Repeated transfer mode is required to use DMA for PWM duty setting.

So the customer wants to use the three PWM duty register to alternate with the DMA0 channel.

The destination address of DMA0 rotates repeatedly in the order of PWM0, PWM1, PWM2, PWM0.

When setting up DMA, he is trying to do the code below.

  

Repeat the routine below.

{

// Configure DMA for PWM0

Disable DMA

DMA setting

DL_DMA_setDestAddr(DMA, DMA_CH0_CHAN_ID, PWM_0CH_duty_reg_addr)

Enable DMA

// Configure DMA for PWM1 

Disable DMA

DMA Setting

DL_DMA_setDestAddr(DMA, DMA_CH0_CHAN_ID, PWM_1CH_duty_reg_addr)

Enable DMA

// Configure DMA for PWM2 

Disable DMA

DMA setting

DL_DMA_setDestAddr(DMA, DMA_CH0_CHAN_ID, PWM_2CH_duty_reg_addr)

Enable DMA

}

Is this concept possible?

And does this concept increase the CPU burden?

Thanks. 

  • Hi SY,

    Is this concept possible?

    Yes, it is possible. Make sure the last DMA transferred and then start next DMA transfer.

    However, when you setting DMA destination, it will increase CPU burden, it seems no advantages for setting the PWM CC value directly. It also only have one simple code.

    B.R.

    Sal

  • Hi, Sal Ye, 

    My customer wants to change the duty for every cycle of PWM as follows.

    It will increase burden to generate an interrupt every cycle of PWM to change the duty.

    So, he uses DMA. 

    he needs 3 channel DMA for 3 PWM channel, but the MSPM0L1304 doesn't support 3 channel DMA with repeat transfer.

    Only 1 channel supports repeat transfer.

  • Hi SY,

    Yes, DMA can not meet the customer required.

    It need to repeated to use single DMA transfer, which may cost larger CPU burden than interrupt.

    B.R.

    Sal