Self-test

No

Item

Description

Related API

Remark

How do I test it?

1

CPU Lockstep

The Hercules product family includes a lockstep processor diagnostic. This feature includes the  addition of a diagnostic Cortex-R4F CPU that is combined into a 1oo1D (single channel with diagnostic  channel) configuration with the application CPU.

The core compare module (CCM) compares the CPU outputs and flags all mis-compares to the ESM. The CCM logic provides self-test and error forcing capability via software triggered hardware. The self-test ensures that the CCM compare logic is working properly. The error forcing capability allows you to test the system level response to a lockstep mis-compare.

SL_SelfTest_CCMR4F ( )

Reference Documents:
 - Safety Manual for TMS570LS12x and 11x Hercules ARM®-Based Safety Critical Microcontrollers
- SafeTI Diagnostic Library Software Safety Manual for Hercules Processors
- TMS570LS12x/11x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual
- sl_selfTest.c
- SafeTIDiagnosticLibrary-User'sGuide-v2.4.0.chm

2

CPU & RAM Built in Self-Test

CPU Built in Self-Test (LBIST)
The Hercules family architecture supports the use of a hardware logic BIST (LBIST) engine self-test controller (STC). This logic is used to provide a very high diagnostic coverage on the lockstep CPUs at a transistor level. This logic utilizes the same design for test (DFT) structures inserted into the device for rapid execution of high quality manufacturing tests, but with an internal test engine rather than external automated test equipment (ATE).

This function triggers the LBIST using the user provided parameters, thus providing runtime diagnostics with execution of test time slices per safety critical loop as well as comprehensive CPU test during  initialization.
RAM Built in Self-Test (PBIST)
Hercules microcontrollers support run-time-programmable memory BIST engine for varying levels of coverage across many embedded memory instance. This function executes the selected PBIST Algorithms on the selected RAM Groups.

This API just initiates the PBIST for the provide ram-groups and algorithms. The API SL_SelfTest_Status_PBIST should be used to get the status of the PBIST execution which has completed.

SL_SelfTest_STC ( )
SL_SelfTest_PBIST ( )

Reference Documents:
 - Safety Manual for TMS570LS12x and 11x Hercules ARM®-Based Safety Critical Microcontrollers
- SafeTI Diagnostic Library Software Safety Manual for Hercules Processors
- TMS570LS12x/11x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual
- sl_selfTest.c
- SafeTIDiagnosticLibrary-User'sGuide-v2.4.0.chm

3

RAM & Flash ECC

Flash Self-Test
F021 Flash wrapper provides to verify various logic. The flash wrapper provides multiple diagnostic modes. This function executes the selected diagnostic mode.
RAM Self-Test
The on-chip SRAM is supported by SECDED ECC diagnostics. This function forces 1Bit/2Bit errors and checks for proper error responses..

SL_SelfTest_Flash ( )
SL_SelfTest_SRAM ( )

Reference Documents:
 - Safety Manual for TMS570LS12x and 11x Hercules ARM®-Based Safety Critical Microcontrollers
- SafeTI Diagnostic Library Software Safety Manual for Hercules Processors
- TMS570LS12x/11x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual
- sl_selfTest.c
- SafeTIDiagnosticLibrary-User'sGuide-v2.4.0.chm