TM4C1294NCPDT: Using SSI and GPIO edge interrupt

Hi,

Joseph Haas said:

When configuring an SSI peripheral, is there any reason why the GPIO edge interrupt for the SSI pins (e.g., the DATA1/RX pin, PQ3 on my design) won't work correctly?  The datasheet block diagram seems to suggest that the GPIO peripheral for inputs bypasses the alternate-function-peripheral MUX (suggesting that GPIO edge detection should function for inputs, at least).  However, I have had difficulty getting this to work.

Hi,

  This is a typical snippet of code to configure GPIO pins for SSI function. This example uses SSI0 but the idea is the same for configuring other SSI modules. Once you call GPIOPinConfigure() the pins (PA2, PA3, PA4, PA5)  are not under the control of GPIO module. You can no longer try to detect edges for interrupt generation. 

//
// Configure the pin muxing for SSI0 functions on port A2, A3, A4, and A5.
//
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA3_SSI0FSS);
GPIOPinConfigure(GPIO_PA4_SSI0XDAT0);
GPIOPinConfigure(GPIO_PA5_SSI0XDAT1);

//
// Configure the GPIO settings for the SSI pins. This function also gives
// control of these pins to the SSI hardware. Consult the data sheet to
// see which functions are allocated per pin.
// The pins are assigned as follows:
// PA5 - SSI0Tx (TM4C123x) / SSI0XDAT1 (TM4C129x)
// PA4 - SSI0Rx (TM4C123x) / SSI0XDAT0 (TM4C129x)
// PA3 - SSI0Fss
// PA2 - SSI0CLK
// TODO: change this to select the port/pin you are using.
//
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_3 |
GPIO_PIN_2);

Joseph Haas said:

Assuming it won't work, I have a work-around planned whereby the alternate function for the SSI is disabled until after the GPIO edge is detected.  Unfortunately, I had a major hardware crash and haven't gotten that repaired yet.

Yes, that should work. Or you can route your RX input to another dedicated GPIO input but that will waste a pin.