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AM2732-Q1: 83 MBOX.SRAM_R2A MBOX.SRAM_R2B

Hello123
Intellectual 730 points

Part Number: AM2732-Q1

Safety manual : SWRU569_AM273x_Safety_Manual_22_sep_revA.pdf:

Hardware and Software Diagnostics
•
MBOX.SRAM_R1 - SRAM ECC
•
MBOX.SRAM_R2A - Boot time PBIST check of the SRAM
•
MBOX.SRAM_R2B - Periodic PBIST check of the SRAM
•
MBOX.SRAM_R3 - Software readback of written data

why 2A 2B are needed at the same time ? if we do PBIST periodic, whether it will destory the normal RAM data ?

  • 0
    TI__Genius 15435 points

    Hi Jin,

    You can only perform PBIST on RAM during boot on 2A section. After that you cannot perform a bist because it simply erases all the data and hence your entry point, startup code etc., will be lost.

  • 0 in reply to Kowshik Gudimetla
    Intellectual 730 points

    If so, why in the safety manual, it says that execute 2A 2B at the same time .

    •
    MBOX.DiagsRamA - This diagnostic option contains MBOX.SRAM_R1, MBOX.SRAM_R2A, MBOX.SRAM_R2B, MBOX.SRAM_R3, MBOX.SRAM_R-T1, MBOX.SRAM_R-T2, MBOX.SRAM_R-T3

    whether it is a mistake of the saf manual ??will TI update the safety manual specification on this point in the future ?

  • 0 in reply to Hello123
    TI__Mastermind 19425 points

    Hi Jin, 

    Let me check this with safety manual owner and provide feedback.

    Thanks and Regards,
    Vishwanath Reddy.

  • 0 in reply to Vishwanath Reddy
    TI__Mastermind 19425 points

    Hi Jin, 

    I checked internally. Both the diagnostics can be done. The system integrator will have to determine the exact nature of using PBIST during operational mode so as to obey the system level FTTI (fault tolerant time interval) and/or PST (process safety time)

    For doing the PBIST test periodically, following needs to be done:

    - disable interrupts to the CPU
    - do a context save
    - run PBIST
    - assuming PBIST ‘passes’ (IF statement)
    - do a context restore
    - re-enable interrupts

    So that the MCU can go back to executing the intended function

  • 0 in reply to Vishwanath Reddy
    Intellectual 730 points

    what is different when we do PBIST peroidly or not ? what will be affacted in Chip level ? whether it will affact ASIL achievement in Chip ASIL B ?

  • 0 in reply to Hello123
    TI__Intellectual 958 points

    Mr. Jin, (as discussed in our call last wk.), PBIST is typically run after releasing POR RESET of the MCU. i.e., it is a diagnostic used during start-up.

    ASIL-B requires >/= 60% LFM

    PBIST will help meet this diagnostic (>60% LFM) coverage. You should be able to make the argument that running PBIST every key-ON/OFF cycle i.e., every time the vehicle is started and stopped is a sufficient interval. 

    After the MCU is running the application, the SRAMs are protected by ECC.

    ECC  helps meet the >/= 90% SPFM for the ASIL-B metric.

    So, there should be no need to run PBIST periodically, or any chance of affecting the ASIL-B metric.

    Hope this helps?