TMS570LS1224: Questions about the FEE concept

Hi Eun Kyu,

I started working on your thread and will try to provide an update soon.

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Thanks & regards,
Jagadish.

Hi Eun Kyu,

First of all, apologies for the delay!

Eun Kyu Son said:

1. The purpose of BANK 7 provided by TMS570LS1224 is 64KB FLASH area to use EEPROM function rather than physical EEPROM, right?

Yes, you are right about this.

Eun Kyu Son said:

2. The reason why at least two virtual sectors are required is to erase and write in block units to compensate for the disadvantage of FLASH, which has to be erased and written in sector units?

Yes, your understanding is correct.

Without these virtual sectors, we can only erase the flash in terms of sectors only. So here what we do is we divide the flash into virtual sectors and each virtual sector can store the several blocks of the data and after one virtual sector is full of data then all the valid blocks in this virtual sector will be copied into the new empty virtual sector and this data full sector will be marked for erase.

For more details regarding this operation, you can refer below thread:

(+) TMS570LS3137: Data backup inside FEE module - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

Eun Kyu Son said:

3. Another purpose of having virtual sectors is to extend the limited write life of 100,000 cycles?

It is not the main purpose of having virtual sectors.

Eun Kyu Son said:

4. After executing TI_Fee_WriteAsync(), the block must be invalidated using TI_Fee_InvalidateBlock() for the next write?

Actually, no need to invalidate the block for the next write. Even you can directly give next write with new block data. The thing here is if you call the read function with block number then it will give you the latest data of the corresponding block.

Eun Kyu Son said:

5. Do I have to do read and invalidate after write?

No Need.

Eun Kyu Son said:

6. Is it correct to run disable irq when executing Write and InvalidateBlock asynchronously? (If disable_irq is not performed, the problem of receiving prefetchEntry of sys_intvecs.asm occurs intermittently, and the same disable_irq is performed when using the F021 flash write function)

Actually, no need to do this.

You can verify the FEE example code in the HALCoGen:

Eun Kyu Son said:

7. In the case of 64KB BANK 7 (4 sectors), is it correct to operate as shown in the figure below when writing -> reading -> invalidating is repeated according to the number of VS (virtual sectors) settings?

Yes, you are right about this.

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Thanks & regards,
Jagadish.

Thanks for your kind reply.

I understand most of the 7 questions.
However, there is an intermittent problem getting the prefetchEntry from sys_intvecs.asm unless disable_irq is run in question 6. That part still needs to figure out the cause. Or would doing disable_irq be okay?

Can you give me some advice on this matter?