I have my own assembly program that i use through advanced config mode in HET2 tab.
I have the second instruction of the program, LO1, generating an interrupt with IRQ=ON.(It is an ECMP).
The interrupt is not working. i already configured in the main code with hetREG2->INTENAS = pHET_L01_1 but its still not working.
Can someone help?
This is my example:
; Simple PWM
L00 CNT { reg=A, irq=OFF, max= 10 }
L01 ECMP { en_pin_action=ON,pin=0,action=PULSELO,reg=A,irq=ON,data=5,hr_data=7};
L02 BR { next= L00, cond_addr=L00, event= NOCOND }
When the value of regA = data in ECMP = 5, an interrupt is generated (bit 1 of HETFLG is set).
The HETFLG is set even if the corresponding bit in the N2HET Interrupt Enable Set Register (HETINTENAS) is 0.
To generate an interrupt, the corresponding bit in the N2HET Interrupt Enable Set Register (HETINTENAS) must be 1.
Is the IRQ enabled?
There are three "gates" before an interrupt request gets to the CPU:
For example, set bit in HETINTENAS
_enable_IRQ()
Hi Nuno,
Just created an example that a DMA transfer is triggered by N2HET instruction running from N2HET2 RAM.
1. DMA transfers data from one buffer to another buffer located in MCU SRAM
2. DMA request line 24 is mapped DMA channel 0. The request line 24 is request number 6 from N2HET instruction
dmaReqAssign(DMA_CH0, 24);
One N2HET instruction can select one of 8 request lines by programming the “reqnum”, the reqnum=6 is used in this example:
ECMP { reqnum=6,request=GENREQ,en_pin_action=ON,pin=8,action=PULSELO,reg=A,irq=ON,data=5,hr_data=0};
3. The N2HET Request Destination Select Register (HETREQDS) should be configured to trigger DMA channel rather than HTU channel:
hetREG2->REQDS = 0xFF;
hetREG2->REQENS = 0xFF;
4. hetRAM2->Instruction[1].Control |= ((0x1<<27) | (0x1 << 22));
this is to enable the request and pin action.
My test shows that the Data is transferred to RX_DATA buffer through DMA channel 0. The DMA interrupt, and N2HET interrupt are generated.
isnt the request line 24 mapped to channel 20?
You can use any DMA channel, but the request numbers are fixed: 20, 21, 24, 25
The highlighted number (4,5,6,7) in [..] in the below table is the request line defined in HET instruction ECAP.
If the request line in ECMP is 4, you have assign the request 20 to a DMA channel.
The pwmnotification() is part of HET interrupt service routine. It is called at the end of a PWM period or end of duty-cycle.
Hi Nuno,
It is a good question. The answer is yes: the corresponding bit of hetantenas must be set. The following two conditions must be met to generate an Interrupt
1. Set the Interrupt enable bit of a HET instruction:
The 1st bit of Control field (2nd 32-bit word) is Interrupt Enable/Disable bit:
2. Set the corresponding bit in HETINTENAS.
In my example, this is set in hetInit()
After those 2 conditions are met, when the ISR is called the code jumps to HetNotification or pwmNotification?
After the interrupt is generated, VIM controller provides the address of HET ISR to the CPU, then CPU starts executing the ISR instructions.
Why do you reset data field of CNT instruction repeatedly? After the data field is cleared, the selected register (register A in my example) is cleared to zero too in next HET loop resolution clock.
This register (register A in my example) is used in ECMP instruction. ECMP compares the value of this register (A) with the value of ECMP data field. If value of selected register (A) doesn't reaches to the value of ECMP data field, the selected pin doesn't toggle, and no interrupt is generated.
