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MCU-PLUS-SDK-AM263X: LP-AM263: ADC synchronization. Question about TI example

Oleg Chaichenko
Prodigy 140 points
Part Number: MCU-PLUS-SDK-AM263X

Hi TI team!

In https://software-dl.ti.com/mcu-plus-sdk/esd/AM263X/latest/exports/docs/api_guide_am263x/EXAMPLES_DRIVERS_ADC_MULTIPLE_SOC_EPWM.html You use only one interrupt for generating "End Of Conversion" and read result from 2 ADC instance and 6 different channels (per 3 AIN for each ADC converter).

1. How can I be sure the "End Of Conversion" is done on all 6 lines, and result will be valid?

2. On practice, I want to use one trigger (ePWM, ADCSOCA) for different ADC convertors and different numbers of lines, and main question is what I should use, to be sure conversion is done for all lines for different ADC, and results is valid there ?

Regrads!

 

  • +1
    TI__Intellectual 2076 points

    Hello Oleg,

    That is a very good question. In the example, mentioned above, A EPWM with period of 2001 TBCLK, with a divider of 4 is used for triggering the ADCs Start Of Conversion. so the periodicity of the trigger is 2001*4*5nS or ~40 uS. This trigger is used for 2 ADCs, ADC0, ADC1 for 3 of their SOC configurations, which are all set in round robin in each ADC. [for info on the trigger and ADC conversion priority, refer, 7.4.2.6 ADC Conversion Priority from TRM.] Both ADCs are set for same sampling period, and Clock Prescaler values, hence their conversion times are same. 

    when the trigger comes, both ADCs simultaneously start conversions on their SOC0, then on SOC1 and finally on SOC2. the INT from the end of the last SOC, should be used for the result reading, (for timing optimizations, it can be of last second). this can ensure the results read in the ISR are completed conversions for all the SOC.

    Ideally, the conversion times, the interrupt latency, trigger periodicity, and any other SOCs in the ADC are in use are few of the factors to be considered for synchronised conversions on the ADCs. More on this can be found at section 7.4.2.12.1 Ensuring Synchronous Operation in TRM.

    Note: in the current latest release of SDK, 8.6, there is a known issue, where the SOC0 is used for the interrupt generations, which will be fixed in the upcoming release 09.00, here is a link to internal bug on the same issue, https://jira.itg.ti.com/browse/MCUSDK-11479 [it might not be accessible to externals, this is for internal tracking] 

    thanks,

    Madhava

  • 0 in reply to Mihira Madhava Bollapragada
    Prodigy 140 points

    Hi Mihira!
    Thanks for your answer!

    Yes, I found this issue in the example also.

    After investigating TRM, could you please clarify my next suggestion
    1. The interrupt should be generated on SOC2 in this example (according to round robin mode) ?

    2. Need to use separate INT for SOC2 on ADC1 instance also?

  • 0 in reply to Oleg Chaichenko
    TI__Intellectual 2076 points

    Hi Oleg, 

    1. Yes, the interrupt should be generated on the SOC2 in the example.
    2. No, there is no need to use a seperate INT for the SOC2 on the second ADC instance as well. since the configurations are identical, / there is no other waiting triggers, the conversions should be parallel, and when first ADC completes its SOC "set", the other ADC would have completed too. you may enable the INT on SOC2 for the second ADC, but only for redundancy check for flag at EOC in the ISR. otherwise you have 2 ISR triggers from same instance, might end up reading duplicates !

    Hope this helps

    Thanks,

    Madhava