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TMS570LC4357: Software i2c bus

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN,

I would like to have a sample i2c bus for use on the above mcu. Please let me know if you have any. Thank you

  • Sample software i2c bus 

  • Very sorry for writing this so many times. It is sample software i2c bus driver code. Thank you

  • Hi LayEng,

    The software drivers for i2c will be generated from HALCoGen. And if you need any reference examples then do the following steps,

    If you were already downloaded HALCoGen, then please go to the Help Topics as highlighted below

    Now in Examples section you could see the several i2c examples:

    Here they will give step by step procedure for generation of i2c driver and with example application project.

    --

    Thanks & Regards,
    Jagadish.

  • From: Chan Lay Eng
    Sent: Friday, 18 August 2023 3:47 pm
    To: TI E2E support forums <noreply-e2e@mail.ti.com>
    Subject: RE: Arm-based microcontrollers forum: TMS570LC4357: Software i2c bus

     

    Dear Jagadish

    Thank you for your reply. I couldn’t access the forum site as it is down for maintenance. Hence this email. I wasn’t referring to the usual i2c bus routines which we have discussed some time back. I stopped i2c development (actually I have finished with the i2c interrupt implementation) because I was asked to attend to the motor driving tasks. In the course of doing motor development, I found that the interrupt of the i2c bus is affecting the motor and vice versa. That is, while running the i2c bus interrupt, another higher priority interrupt relating to motor driver came in. After returning from servicing the motor interrupt, the mcu hangs. It went to dataEntry interrupt vector. Can you tell me how to resolve this issue?

     

    As a result of this issue, I am looking to implement a i2c software driven bus which is a generic bus and not use the TI provided i2c in the mcu. Most ppl like to call the TI provided i2c as hardware i2c whereas the generic port driven i2c bus as software i2c bus. My request is for a sample code of the generic port driven i2c bus using the same pins as the inbuilt i2c bus.

     

    The picture of your msg is quite small and when I expand, it is blur. But I think what I want is not in halcogen.

    Thank you. Looking forward to your reply.

     

     

     

  • Above is what I sent you last friday. I just found out today that it is a no reply email

  • Hi LayEng,

    That is, while running the i2c bus interrupt, another higher priority interrupt relating to motor driver came in. After returning from servicing the motor interrupt, the mcu hangs.

    Are you saying that nested interrupts?

    Cortex R4/5 does not support interrupt nesting inherently.

    That means if the processor servicing the one IRQ interrupt then all interrupts related to that IRQ will get disabled until the processor completes the current IRQ execution. And it will execute the next interrupt after completing current interrupt execution only.

    Refer below thread for more details:
    (+) TMS570LS3137: svc soft interrupt issue - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

    (+) TMS570LC4357: Using ARM effectively - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

    So, i don't understand why you are getting dataEntry interrupt vector in your case?

    As a result of this issue, I am looking to implement a i2c software driven bus which is a generic bus and not use the TI provided i2c in the mcu. Most ppl like to call the TI provided i2c as hardware i2c whereas the generic port driven i2c bus as software i2c bus. My request is for a sample code of the generic port driven i2c bus using the same pins as the inbuilt i2c bus.

    We don't have any generic port driven i2c example.

    And i think, this would not help you to solve the issue, because even if you use this generic port driven i2c example also you will get interrupts right and again you might end up with the same issue.

    In worst case scenario at least, you could use the present i2c in polling mode instead of interrupt mode, i guess this would solve your issue instead of going for generic i2c on port driven.

    So, my suggestion would be first we will try to debug the current issue root cause.

    --

    Thanks & regards,
    Jagadish.

  • Dear Jagadish

    Thanks for your reply. Can you give a sample code on handling nested interrupt? I2C has a lower priority than some timer interrupts that we have. We have 1ms timer interrupt, 100ms interrupt, gpio interrupt. It is possible that while servicing i2c interrupt, the other higher priority interrupts came in. Question is how to get back to the i2c interrupt if it has been interrupted.

    I could not use the polling method for very much the same reason. I have noticed that the flags don't get updated resulting a 'hang' while loop waiting for the i2c flags like stop big, tx, rx flag etc. That is why I chose to use the interrupt method which is more consistent. I suggest you give me a sample code on how to handle interrupt nesting. 

    As for why I got dataEntry interrupt, I have no idea. I only know that when the mcu hangs, it is at this location. When I remove calling i2c routines, it will not happen. As you know, calling the i2c api will enable the i2c interrupt

  • Hi LayEng,

    Thanks for your reply. Can you give a sample code on handling nested interrupt?

    Cortex R4/5 does not support interrupt nesting inherently. If you do need nested interrupts it needs to be managed completely by the application code. There is no hardware mechanism to aid with this other than the pending interrupt status flags.

    Below application note will be helpful for implementation:
    Nested Interrupts on Hercules ARM Cortex-R4/5-Based Microcontrollers (ti.com)
    T
    his application note also consists of example code to download, in this example they used two RTI interrupts RTI compare0 and RTI compare1, the RTI compare0 will toggle LED0 and RTI compare1 will toggle LED1. The RTI compare0 interrupt will occur for every 1sec and in this interrupt routine we will ON the LED0 and then they will wait for 0.5Sec and then they will OFF the LED0 and do the exit from interrupt handler of RTI compare0. And similarly, RTI compare1 interrupt will occur for every 4sec and in this interrupt handler they will first ON the LED1 and then they will wait for 2Sec and then they will OFF the LED1. Due to this behavior sometimes the RTI compare-1 interrupt will be interrupted by RTI compare-0 interrupt and the execution of RTI compare1 will get stop and processor will be nested to the RTI compare-0 and will execute the RTI compare-0 and after executing compare0 handler, again processor will start executing compare-1 code where exactly it stopped. I mean at this nested condition can be visualized with two LED's ON. Please verify above note to understand in more details.

    Using above application note we can create two level nested interrupts, the low level will be using IRQ and which will get interrupted by high level FIQ and after executing this FIQ the processor again will continue to execute IRQ interrupt.

    I2C has a lower priority than some timer interrupts that we have. We have 1ms timer interrupt, 100ms interrupt, gpio interrupt. It is possible that while servicing i2c interrupt, the other higher priority interrupts came in. Question is how to get back to the i2c interrupt if it has been interrupted.

    As nested interrupt is not possible in Cortex R4/5, the processor will never get interrupted by other timer interrupts while it is servicing i2c interrupt. If processor servicing the i2c interrupt, then all other IRQ interrupts will be disabled until it completes the current i2c handler execution.

    The priority only applicable for before processing the interrupt, i mean if we got two interrupts at the same time for example i2c and timer, then it will check which interrupt have the high priority will get executed first.

    --

    Thanks & regards,
    Jagadish.