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MSPM0G1507: FFC PLL monitor behaviour PG2

DJ-NG
Genius 9355 points
Part Number: MSPM0G1507


Hi Champs!

I received question from customer:

With the MSPM0 I use the FCC to monitor the PLL frequency.
In order to be able to use the FCC, I have so far accessed the external 32 KHz.

In the new manual (SLAU846 - JUNE 2023), under "2.3.5 Frequency Clock Counter (FCC)" I read that the internal 32 KHz of the SYSOSC can also be used as a source. This was not documented in a previous Early Sample manual.

In the “Figure 2-8. MSPM0Gxx Top Level Clocking Tree”, as in the older manual, only external CLKs are specified.

Can the FCC now also be used with the internal LFOSC?
If so, can this source also be used with the watchdog and is the LFOSC (int. 32 KHz) independent of the PLL?

B R Dirk

  • 0
    TI__Mastermind 26850 points

    Hi Dirk,

    The selection for the FCC trigger is either an FCC_IN or the LFCLK. LFCLK is the result of the mux between internal (LFOSC) and external (LFXT or LFCLK_IN). We are going to update the image and wording to address this. To directly address your question, yes the FCC can be triggered by the internal LFOSC.

    The watchdog uses LFOSC as its source so it is independent of the PLL. However the LFCLK is sync'd to MCLK (which can be derived from the SYSPLL if enabled), this synchronization can be beneficial as the device can be reset if the clocks get desynced.

    Regards,

    Luke