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TM4C1290NCPDT: EPI host mode clocking

Part Number: TM4C1290NCPDT

For a legacy system upgrade, We are interfacing a TM4C1290 to a FPGA, and two duart chips. We are using address decoding for the chip selects. The duarts are provided by a tl16c752.

We were initially looking at the GPIO mode, but discovered the timing would not match the read/write requirements of the duart. 

If we use the Asynchronous Host mode, can we output the clock for use externally, would this still be in conformance with the timing of read/write/data/address line changes? 

The System clock is an external clock and the EPI is set to use this unmodified. What is the expected propagation delay from input to output?

  • HI,

    If we use the Asynchronous Host mode, can we output the clock for use externally, would this still be in conformance with the timing of read/write/data/address line changes? 

    In Asynchronous Host mode, EPICLK can be brought out although typically it is not used by the external devices because of the nature of asynchronous protocol which does not require the clock. See datasheet description. The asynchronous interface signals are generated wrt EPICLK. 

    The System clock is an external clock and the EPI is set to use this unmodified.

    What do you mean the System Clock is an external clock? EPICLK is an internally generated clock. EPI module does not take any externally (off-chip) generated clock as a reference clock. 

  • I understand that the baud clock supplies the external clock, but Isn't that derived from the system clock?

     If the system clock is set to an external clock source and the PLL is not used, I would expect that the EPI clock to be equal to the system clock if the divisor is not set EPIClk = (Divider == 0) ? SysClk : (SysClk / (((Divider / 2) + 1) ∗ 2)).

  • I understand that the baud clock supplies the external clock, but Isn't that derived from the system clock?

    Yes.

    If the system clock is set to an external clock source and the PLL is not used, I would expect that the EPI clock to be equal to the system clock if the divisor is not set EPIClk = (Divider == 0) ? SysClk : (SysClk / (((Divider / 2) + 1) ∗ 2)).

    Perhaps I'm mistaken by what you mean by external clock source. If you refer to external clock source (relative to the overall MCU) as a clock source that is outside the MCU device then there is no such clock source. The MCU system clock source can only come from either PLL or one of the oscillators (e.g MOSC, PIOSC, internal 30khz OSC or an external 32.768Khz OSC). If you mean the external clock source (relative to the EPI module) as the reference clock for the EPI module, then yes. The EPI module uses the internally generated system clock to divide down for EPICLK generation. 

  • Ok, so a MOSC external 30.72MHz clock source (SYSCTL_OSC_MAIN | SYSCTL_USE_OSC) input should give a 30.72MHz EPI clock out. Is that correct.

  • Please note of the below limitation if you are using a crystal. You can only achieve 30.72Mhz (not sure why this particular frequency for EPICLK) if you feed the MCU with a single-ended clock. 

    Main Oscillator (MOSC). The main oscillator provides a frequency-accurate clock source by
    one of two means: an external single-ended clock source is connected to the OSC0 input pin, or
    an external crystal is connected across the OSC0 input and OSC1 output pins. If the PLL is being
    used, the crystal value can be any frequency between 5 MHz to 25 MHz (inclusive). Refer to
    Table 5-7 on page 238 for recommended crystal values and PLL register programming. If the PLL
    is not being used, the crystal may be any one of the supported frequencies between 4 MHz to
    25 MHz. The single-ended clock source range is from DC through the specified speed of the
    microcontroller.

  • We are using an external single-ended clock source is connected to the OSC0 input pin at 30.72MHz as the system clock. 

  • If you are using a single-ended clock input then the limitation is the clock not exceed the max spec frequency which is 120Mhz. You are fine here. 

  • Thanks Charles, 

    I'm not seeing the 30.72Mhz out of the EPI, Look like I'm getting 16Mhz (default?) when 30.72 is input (measured).

    my setup

        SysCtlMOSCConfigSet(SYSCTL_MOSC_HIGHFREQ);
        SysCtlClockOutConfig(SYSCTL_CLKOUT_MOSC | SYSCTL_CLKOUT_EN , 1);
        SysCtlClockFreqSet(SYSCTL_OSC_MAIN | SYSCTL_USE_OSC, 30720000);
        ... removed gpio assignment ...
        EPIDividerSet(EPI0_BASE, 0x00000000);		// 0x00010001 1/2 (System) = 120MHz * 0.5 = 60MHz
    	EPIModeSet(EPI0_BASE, EPI_MODE_HB16 );	// General Purpose
    	EPIConfigHB16Set(EPI0_BASE, 
                           EPI_HB16_MODE_ADDEMUX | // sets up data and address as separate, D[15:0].
                           EPI_HB16_WRWAIT_0 |   // write wait 2 EPI clocks
                           EPI_HB16_RDWAIT_0 ,   // write wait 2 EPI clocks
                           0);
        
    	EPIAddressMapSet(EPI0_BASE, 
                         EPI_ADDR_PER_SIZE_64KB | 
                         EPI_ADDR_PER_BASE_C  // set base to 0xC0000000
                         );

    What's wrong with the setup?    
     
  • sorry, copied the wrong line

    SysCtlMOSCConfigSet(SYSCTL_MOSC_HIGHFREQ|SYSCTL_MOSC_SESRC  | SYSCTL_MOSC_PWR_DIS);
    tried it both ways. Can see the clock on osc0 
  • Hi,

      The SysCtlClockFreqSet() API is not designed to support single-ended input clock. The arguments you are passing right now will cause SysCtlClockFreqSet() into thinking that there is no oscillator source and hence pick PIOSC (16Mhz) by default. 

    Please try to fool the API into thinking it is a 25Mhz MOSC with the below call although externally you are driving a single-ended clock input with OSC1 left open.

      SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_OSC), 25000000);

      Please show the settings of the below registers. You may need to manually write to some of the fields to get it working. 

  • (gdb) x 0x400FE0B0
    0x400fe0b0: 0x03000000
    (gdb) x 0x400FE07C
    0x400fe07c: 0x00000030

    The EPI clock out is still 16Mhz 

  • OK, I manually set

    (gdb) set {int32_t}0x400fe0b0 = 0x03300000
    (gdb) x 0x400FE0B0
    0x400fe0b0: 0x03300000

    After the call and the clock is output correctly on the EPI again. Don't know why It was working before...

    Should I just ignore the  SysCtlClockFreqSet and HWREG(SYSCTL_RSCLKCFG_R)=0x03300000;

    Not that  simple... rewrote the SysCtlClockFreqSet and I see the correct clock out.