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TMS570LC4357: Missing description of NMPU register

Part Number: TMS570LC4357

Hello,

During the use of MPU, it was found that there are two descriptions in the manual that cannot be found in the register description. Please help to confirm:
1,
In the description of the NMPU chapter, it is mentioned that when the NMPU lock step comparison error occurs, the DIAGERR in the MPUERRSTAT register can be set to 1. However, after querying the description of the MPUERRSTAT register, it was found that there is no description of the DIAGERR bit in the register field.

2. The MPUREGAM0-7, MPUYREGTA0-7, and MPUREGMT0-7 described in the MPUREGNUM register are not mentioned in the register field and NMPU context.

Regards,

Gary

  • Hi Gary,

    1,
    In the description of the NMPU chapter, it is mentioned that when the NMPU lock step comparison error occurs, the DIAGERR in the MPUERRSTAT register can be set to 1. However, after querying the description of the MPUERRSTAT register, it was found that there is no description of the DIAGERR bit in the register field.

    The lockstep is implemented for address masking, address translation, and mode translation. If there is a lockstep comparison error, the ERRFLG in MPUERRSTAT register will be set. But DIAGERR is not implemented.

    For more details refer below old thread:
    (19) TMS570LC4357: NMPU lockstep feature / Registers called in SNPU563A - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

    Thanks for pointing out this typo in TRM, we will take corrective action for this.

    2. The MPUREGAM0-7, MPUYREGTA0-7, and MPUREGMT0-7 described in the MPUREGNUM register are not mentioned in the register field and NMPU context.

    I searched for these registers in old threads and register header files but i don't find the description for these registers.

    So please give me some time to discuss with internal team on this.

    --

    Thanks & regards,
    Jagadish.