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MSPM0G3507: External HFCLK not recognized by PLL

Manuel Philippin
Intellectual 1335 points
Part Number: MSPM0G3507
Other Parts Discussed in Thread: SYSCONFIG

Hello MSP team,

my customer is currently trying to connect an external clock with 37.125MHz to the MSPM0G HFCLK input.
MSPM0G3507 Rev B, SDK 1.10.01.05

The problem is that the external HFCLK is not recognized by the PLL, after configuration the CLKSTATUS register has the value of 0x20107800 and therefore not HFCLK was recognized.
They have already checked the clock and it is working fine and is up during booting.

After investigation there were some issues:

1. Incorrect pin configuration: DL_GPIO_initDigitalInput(GPIO_HFCLKIN_IOMUX); instead of DL_GPIO_initPeripheralInputFunction(GPIO_HFCLKIN_IOMUX, GPIO_HFCLKIN_IOMUX_FUNC); 

2. The generated DL_SYSCTL_SYSPLLConfig structure is not matching. Is: DL_SYSCTL_SYSPLL_INPUT_FREQ_8_16_MHZ ; should be: DL_SYSCTL_SYSPLL_INPUT_FREQ_32_48_MHZ 

3. It is not possible to output the clock to CLK_OUT or be counted by FCC.

Clock tree is activated. 
Is there any special configuration necessary to use an external clock on MSPM0G?

Thanks in advance.

Regards
Manuel

  • 0
    TI__Mastermind 25690 points

    Hi Manuel,

    1. Trying to replicate your issue (I do not have a 37 MHz crystal so I am just working with the build) I do not see any errors thrown or incorrect code being called in Sysconfig generation.
    2. For the DL_SYSCTL_SYSPLLConfig structure the input frequency is not equal to the HFXT but equal to the value after the PDIV. See this snippet from the MSPM0 G TRM section 2.3.1.3.1

      So if your input frequency is generating the 8-16MHz, I would bet that your PDIV value is 4 (37/4 is 9.25).
    3. You can set SYSPLL1 to be the output for CLKOUT (remember clock out needs to be less than or equal to the max speed of your GPIO, 40MHz for High-speed IO). The FCC can take CLK_OUT or your PLL output directly.

      The FCC CLK is the signal to be counted and your FCC Trigger is the reference clock for to set the time period in which to count your clock. (See Section 2.3.5 of the TRM)

    Regards,
    Luke

  • 0 in reply to Luke Ledbetter
    TI__Intellectual 1335 points

    Hi Luke,

    my customer has tested the CLKOUT and FCC with the internal SYSOSC, which did work.

    However the issue that the external HFCLK is not recognized by the MSPM0 still persists. 

    Configuration is as follows: 
    HW: 
    RHB package, digital oscillator connected to PA6, pin 10

    SysConfig:
    Input Select: Digital, PDIV 4

    The external clock is already started before the MSP so the signal should be present already.
    Are you aware of any special timing requirements for the HFCLK to be recognized?

    Best regards
    Manuel

  • 0 in reply to Manuel Philippin
    TI__Mastermind 25690 points

    Hi Manuel,

    There is a startup time for crystals in most cases, there is a field for startup time in sysconfig. 

    If you want to, I can double check their code and sysconfig to see if its a SW or HW issue.

    Regards,
    Luke