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Two topics that I want to cover
- I have been in touch with Acontis Technologies on their EtherCAT Master IP stack (we know that is supportable on AM4377 and AM5708). I am looking at both AM2434 and AM2432 as a 32-bit EtherCAT master application - can it be possible to get that Acontis Master IP stack supported onto either of these? I know that Acontis also supports the AM6442 that also have ARM R5 32-bit cores.
- Did TI create an EtherCAT Master IP stack on their own 64 bit ARM on the AM64xx line? Does TI feel that a 64 bit EtherCAT master ARM is more useful longer term than a 32 bit EtherCAT master ARM solution?
thanks
Jim Mrowca
ex-TIer 1982-1997
Hi Jim,
Yes it should be possible to support EtherCAT master on am243x, few third parties have done it. I believe acontis may also have done so. You can also check IbV
Did TI create an EtherCAT Master IP stack on their own 64 bit ARM on the AM64xx line? Does TI feel that a 64 bit EtherCAT master ARM is more useful longer term than a 32 bit EtherCAT master ARM solution?
thanks
Pekka Varis Could you please comment here?
Regards
R5 based EtherCAT main (master) with optimized link layer is supported today on AM64x and AM243x by https://www.ibv-augsburg.de/en/products/icnet/ethercat-master/ .
Acontis is another possibility, their initial product is Linux A53 I believe. Looks like you are already in contact with them.
Did TI create an EtherCAT Master IP stack on their own 64 bit ARM on the AM64xx line?
TI does not have or plan to develop an EtherCAT main/master/controller.
Does TI feel that a 64 bit EtherCAT master ARM is more useful longer term than a 32 bit EtherCAT master ARM solution?
The native integer width or pointer size (32 vs 64-bit) alone should not have any performance advantage or disadvantage. The R5 based solutions can have better achievable cycle time, partly based on traditional MCU and RTOS programming model with dedicated TCM and SRAM memories to manage worst case interrupt latency, versus a Cortex A53 and high level OS like Linux with MMU and purely cache based memory model and a throughput optimized core. A53 will outperform R5 with heavy compute like FFT with a factor of maybe 5x.