Part Number: AM2432
[日本語]
パケットを受信開始してからCRCチェック終了までのCRCモジュールに対する手順を教えてください。
[English]
Please tell me the procedure for the CRC module from the start of packet reception to the end of the CRC check.
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Part Number: AM2432
[日本語]
パケットを受信開始してからCRCチェック終了までのCRCモジュールに対する手順を教えてください。
[English]
Please tell me the procedure for the CRC module from the start of packet reception to the end of the CRC check.
Hi Shimizu-san,
SORTE_G uses the standard CRC hardware of ICSS. Please refer to the AM243x TRM, section "PRU_ICSSG MII_G_RT Module".
For IOEX receive in device, we use RX L2 method: See TRM section "RX MII Port → RX L1 FIFO → RX L2 Buffer → PRU"
We identify the last location of the receive byte, and then check bit 7 (ERROR_CRC) of the received frame, which resides somewhere between R10 to R13 called Status Registers. This makes sense when you read the TRM.
The location in ioex_g.asm where the check is done is here.
; Check CRC
; 2 bytes of data are merged into one byte of status
lsr R1.b0, R1.b0, 1
; add offset to R10
add R1.b0, R1.b0, (10*4)
mvib TEMP_REG_1.b0, *R1.b0
qbbs IOEX_FWD_EOF_CRC_ERROR, TEMP_REG_1.b0, L2_ERROR_CRC_FLAG_BITNUM
I hope this answers your question.
Regards,
Thomas