AM2432: Why reason cause MCAN_isMemInitDone isn't working

Hi Sheng,

Did you add the RAT entry for 0xA0000000 to 0x20000000 in example.syscfg like the empty_am243x-evm_m4fss0-0_nortos_ti-arm-clang?

Best regards,

Ming

Hi Ming

Ming Wei said:

Did you add the RAT entry for 0xA0000000 to 0x20000000 in example.syscfg like the empty_am243x-evm_m4fss0-0_nortos_ti-arm-clang?

   Yes,The Setting of RAT as below picture.

This is M4F MCAN FW link.

    Could you help me check it?

BR

Sheng Yi

Hi Sheng,

I cannot access to your shared code via google drive. Can you put it in a zipped file and shared it here? Please rename the linker.cmd file into linker.lnk before zip the folder.

Best regards,

Ming

Hi Ming

  AM2432 MCAN TEST FW Link

  This is AM2432 MCAN TEST FW Link

   Coud you help me review it ?

BR

Sheng Yi

Hi Ming

    Thank you for your reply.

    I have modied  address,but it still fail.

    Below link is AM2432 MCAN Test FW.

    Could you help me review it?

    AM2432_MCAN_TEST_FW

BR

Sheng Yi

Hi Ming

      Thank you for your reply.

      The MCAN_isMemInitDone is work.

      But  the Poll for Rx routine didn't complete.

      Could you help me review it?

     This is AM2432 MCAN loopback_polling link

br

shengYi

Hi Ming

      Thank you for your reply.

      I have checked address of below.

      The address of MCAN0_SS is 0xA0700000  in M4F.

      The address of MCAN0_CFG is 0xA0701000 in M4F.

      But resut of test sometimes was fail. The Poll for Rx routine can't complete.

      Could you help me review it?

     AM2432 MCAN TEST FW

BR

Sheng Yi

Hi Sheng,

The screen capture shows "All tests have passed". Why do you say it is not completed?

Best regards, 

Ming

Hi Ming

Thank you for your reply.

Sometimes, it was not show "All tests have passed in screen.

Another question ,how to set the MCAN of PowerClock_init in M4F?

Below code is for MCAN of PowerClock_init, but it don't work in M4F.

What should I do to modify the PowerClock_init for MCAN in M4F?

#define SOC_MODULES_END (0xFFFFFFFFu)

typedef struct {

uint32_t moduleId;
uint32_t clkId;
uint32_t clkRate;

} SOC_ModuleClockFrequency;

uint32_t MCAN_gSocModules[] = {
TISCI_DEV_MCAN0,

SOC_MODULES_END,
};

SOC_ModuleClockFrequency MCAN_gSocModulesClockFrequency[] = {
{ TISCI_DEV_MCAN0, TISCI_DEV_MCAN0_MCANSS_CCLK_CLK, 80000000 },

{ SOC_MODULES_END, SOC_MODULES_END, SOC_MODULES_END },
};

void MCAN_Module_clockEnable(void)
{
int32_t status;
uint32_t i = 0;

while(MCAN_gSocModules[i]!=SOC_MODULES_END)
{
status = SOC_moduleClockEnable(MCAN_gSocModules[i], 1);
DebugP_assertNoLog(status == SystemP_SUCCESS);
i++;
}
}

void MCAN_Module_clockDisable(void)
{
int32_t status;
uint32_t i = 0;

while(MCAN_gSocModules[i]!=SOC_MODULES_END)
{
status = SOC_moduleClockEnable(MCAN_gSocModules[i], 0);
DebugP_assertNoLog(status == SystemP_SUCCESS);
i++;
}
}

void MCAN_Module_clockSetFrequency(void)
{
int32_t status;
uint32_t i = 0;

while(MCAN_gSocModulesClockFrequency[i].moduleId!=SOC_MODULES_END)
{
status = SOC_moduleSetClockFrequency(
MCAN_gSocModulesClockFrequency[i].moduleId,
MCAN_gSocModulesClockFrequency[i].clkId,
MCAN_gSocModulesClockFrequency[i].clkRate
);
DebugP_assertNoLog(status == SystemP_SUCCESS);
i++;
}
}

void MCAN_PowerClock_init(void)
{
MCAN_Module_clockEnable();
MCAN_Module_clockSetFrequency();
}

BR

Sheng Yi