Part Number: AM2432
［日本語］
■SORTE_G, OUTパケットのタイムスタンプについて
時刻同期で使用するOUTパケットのタイムスタンプは、どこに付加されていますか。
Preambleの後ろをお聞きしましたが、『SORTEマスタのリファレンス・デザイン』では、BYTE23(CRC8)の前となっています。
［English］
■SORTE_G, OUT packet timestamp
I'd like to know the location for the timestamp in OUT packet.
I heard at our last meeting that it is just after Preamble in the packet, but in the "SORTE Master Reference Design" it is before BYTE23(CRC8).
Then, I'd like to confirm it again, to be sure.
Hi Shimizu-san,
The timestamp is taken by IEP peripheral when start-frame-delimiter (SFD) is received in MII_RT hardware.
Byte 2 in the output frame format is 0xd5, which is the SFD byte. Upon reception of SFD, the CAP1/3 register in IEP will take the timestamp of the received frame.
The SORTE_G device firmware will take the timestamp from CAP1 or CAP3 (it depends to which port the controller is connected to) and compare it to the expected time stamp.
For example, device #4 has the expected time stamp to be 2500ns into the cycle, and the time stamp of CAP1 shows 2550ns. Then device #4 is off by 50ns. It runs actually faster than the controller IEP time. In this case the device #3 will use the IEP register IEP_GLOBAL_CFG_REG bit fields CMP_INC and register IEP_COMPEN_REG to adjust the time of IEP in device #4.
The IEP compensation is handled in file sync_g.asm, around the label SYNC_HANDLER_UPDATE.
Best regards, Thomas
