TMS570LS3137: HIGH PRIORITY IRQ

Hüseyin Alperen Gülmen

Part Number: TMS570LS3137

When using two IRQ interrupts, how can I ensure that the high priority IRQs interrupts the low priority IRQs while processing, according to their priorities? (The processor I use is TMS570LS3137)

I could not succeed this situation when I set two IRQ priority.

over 2 years ago

+1 jagadish gundavarapu over 2 years ago

TI__Guru 70621 points

Hi Huseyin,

Cortex R4/5 does not support interrupt nesting inherently. If you do need nested interrupts it needs to be managed completely by the application code. There is no hardware mechanism to aid with this other than the pending interrupt status flags.

The below application can handy for this:
1462.Nested Interrupts on Hercules spna219.pdf

Thanks & regards,
Jagadish.

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TMS570LS3137: HIGH PRIORITY IRQ