Hi,
I slightly modified the sample code "flashctl_multiple_size_write_LP_MSPM0G3507_nortos_ticlang" and confirmed it.
An overrun error will occur if UART is received while FLASH is being erased/written continuously.
Please tell me the reason why the overrun error occurs.
By the way, if you execute only FLASH erase continuously, no overrun error will occur.
The UART sends data every 20 milliseconds from another microcontroller.
Sample Program :
#include "ti_msp_dl_config.h" /* Address in main memory to write to */ #define MAIN_BASE_ADDRESS (0x00001000) /* 8-bit data to write to flash */ uint8_t gData8 = 0x11; /* 16-bit data to write to flash */ uint16_t gData16 = 0x2222; /* 32-bit data to write to flash */ uint32_t gData32 = 0x33333333; /* Array to write 64-bits to flash */ uint32_t gDataArray64[] = {0xABCDEF00, 0x12345678}; /* 32-bit data array to write to flash */ uint32_t gDataArray32[] = {0x00000000, 0x11111111, 0x22222222, 0x33333333, 0x4444, 0x55555, 0x66, 0x77, 0x8, 0x9}; volatile DL_FLASHCTL_COMMAND_STATUS gCmdStatus; static void UART_Recv( void ); int main(void) { SYSCFG_DL_init(); NVIC_ClearPendingIRQ(UART_0_INST_INT_IRQN); NVIC_EnableIRQ(UART_0_INST_INT_IRQN); while (1) { /* Unprotect sector in main memory with ECC generated by hardware */ DL_FlashCTL_unprotectSector( FLASHCTL, MAIN_BASE_ADDRESS, DL_FLASHCTL_REGION_SELECT_MAIN); /* Erase sector in main memory */ gCmdStatus = DL_FlashCTL_eraseMemoryFromRAM( FLASHCTL, MAIN_BASE_ADDRESS, DL_FLASHCTL_COMMAND_SIZE_SECTOR); if (gCmdStatus == DL_FLASHCTL_COMMAND_STATUS_FAILED) { /* If command was not successful, set a breakpoint */ __BKPT(0); } /* 8-bit write to flash in main memory */ DL_FlashCTL_unprotectSector( FLASHCTL, MAIN_BASE_ADDRESS, DL_FLASHCTL_REGION_SELECT_MAIN); gCmdStatus = DL_FlashCTL_programMemoryFromRAM8WithECCGenerated( FLASHCTL, MAIN_BASE_ADDRESS, &gData8); if (gCmdStatus == DL_FLASHCTL_COMMAND_STATUS_FAILED) { /* If command was not successful, set a breakpoint */ __BKPT(0); } } } void UART_0_INST_IRQHandler(void) { switch (DL_UART_Main_getPendingInterrupt(UART_0_INST)) { case DL_UART_MAIN_IIDX_RX: NVIC_ClearPendingIRQ(UART_0_INST_INT_IRQN); UART_Recv(); break; default: break; } } unsigned char RDataBuf[1024]; int buf_size = 0; int err_cnt = 0; int err_flag = 0; int recv_cnt = 0; static void UART_Recv( void ) { #define UCASTAT_MASK (DL_UART_ERROR_OVERRUN | DL_UART_ERROR_BREAK | DL_UART_ERROR_PARITY | DL_UART_ERROR_FRAMING) if( (unsigned short)DL_UART_Main_getErrorStatus(UART_0_INST, UCASTAT_MASK) != 0 ) { err_flag = 1; RDataBuf[buf_size] = '@'; buf_size++; if( buf_size == 1024) { buf_size = 0; } } else { RDataBuf[buf_size] = DL_UART_receiveData(UART_0_INST); buf_size++; if( buf_size == 1024) { buf_size = 0; } } if(buf_size == 0) { if( RDataBuf[1023] == 0x05) { recv_cnt++; if(err_flag == 1) { err_cnt++; err_flag = 0; } } } else { if( RDataBuf[buf_size - 1] == 0x05) { recv_cnt++; if(err_flag == 1) { err_cnt++; err_flag = 0; } } } }
UART Settings:
static const DL_UART_Main_ClockConfig gUART_0ClockConfig = { .clockSel = DL_UART_MAIN_CLOCK_BUSCLK, .divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1 }; static const DL_UART_Main_Config gUART_0Config = { .mode = DL_UART_MAIN_MODE_NORMAL, .direction = DL_UART_MAIN_DIRECTION_TX_RX, .flowControl = DL_UART_MAIN_FLOW_CONTROL_NONE, .parity = DL_UART_MAIN_PARITY_NONE, .wordLength = DL_UART_MAIN_WORD_LENGTH_8_BITS, .stopBits = DL_UART_MAIN_STOP_BITS_ONE }; SYSCONFIG_WEAK void SYSCFG_DL_UART_0_init(void) { DL_UART_Main_setClockConfig(UART_0_INST, (DL_UART_Main_ClockConfig *) &gUART_0ClockConfig); DL_UART_Main_init(UART_0_INST, (DL_UART_Main_Config *) &gUART_0Config); /* * Configure baud rate by setting oversampling and baud rate divisors. * Target baud rate: 38400 * Actual baud rate: 38403.84 */ DL_UART_Main_setOversampling(UART_0_INST, DL_UART_OVERSAMPLING_RATE_16X); DL_UART_Main_setBaudRateDivisor(UART_0_INST, UART_0_IBRD_32_MHZ_38400_BAUD, UART_0_FBRD_32_MHZ_38400_BAUD); /* Configure Interrupts */ DL_UART_Main_enableInterrupt(UART_0_INST, DL_UART_MAIN_INTERRUPT_RX); DL_UART_Main_enable(UART_0_INST);