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AM2634: RGMII internal delay question

Matt Calvo
Genius 14755 points
Part Number: AM2634

Hey Sitara MCU team,

I have a customer prototyping with the AM263 for a new design and we found a slight discrepancy between the datasheet and the TRM that we're hoping you might be able to comment on and clear up.

In Section 6.1.7.5 of the AM263 TRM, it states that "CPSW_CONTROL.RGMII*_ID_MODE, when set to 1, enables the internal delay mode for the transmit path of
the corresponding RGMII port. This provides a phase shift of quarter cycle b/w clock and data". This statement would lead us to believe that the internal delay mode can conversely be disabled when ID_MODE is '0'.

In Figure 7-14 of the AM263 datasheet, Note A states that "TXC is delayed internally before being driven to the RGMII[x]_TXC pin. This internal delay is always enabled".

When the datasheet mentions that this RGMII TXC internal delay is always enabled, does that directly contradict with the ID_MODE functionality mentioned in the TRM? What is the default RGMII transmit delay setting and can it in fact be enabled/disabled?

Thanks for your help!

Best regards,

Matt Calvo

  • 0
    TI__Genius 14755 points

    Hey Sitara MCU team,

    Any updates on this? Please let me know if anything needs further clarification or if you have any questions!

    -Matt

  • 0 in reply to Matt Calvo
    TI__Expert 8620 points

    Hi Matt,

    My understanding is that in DS this should have been "By default the delays are enabled or disabled" . Thanks for pointing this out. I will check internally, clarify also fix the needed portion in TRM/DS.

    Please expect delayed response towards end of coming week.

    Best Regards, Shiv

  • 0 in reply to Shivasharan Nagalikar
    TI__Genius 14755 points

    Hey Shiv,

    Thank you for following up on this question and for the heads up that you are checking internally to see what the correct default setting is and what specific updates are needed for the DS and the TRM. The key takeaway at the moment is that this can in fact be enabled and disabled so that is good to know.

    I appreciate the response timeline and am looking forward to your reply late next week with a definitive confirmation.

    Best regards,

    Matt 

  • +1 in reply to Matt Calvo
    TI__Expert 8620 points

    Hi Matt,

    1. The reset value of the MMR is 1 and the delay mode is enabled by default (after POR/warm reset, etc)
    2. Mode is controllable through the MMR. it can be enabled or disabled.

    So we would need to update the DS statement:   "This internal delay is always enabled"   to    "By default delay mode enabled". I will trigger JIRA to update this internally. Thanks.

    Best Regards, Shiv