AM2634-Q1: Silicon advisory i2394- Race condition in interrupt and error aggregator capture registers resulting in events miss

Hello Will,

Will Gao said:

1). I can't find register MSS_CTRL: *INTAGG_STATUS_REG, *TPCC_ERR/INTAGG_STATUS_RAW in Register Addendum. Please clarify the registers with this issue. 

I can understand the confusion on this, we could be more descript about it. The registers in question are MSS_CTRL_TPCC0_INTAGG_STATUS, MSS_CTRL_TPCC0_ERRAGG_STATUS_RAW, and MSS_CTRL_TPCC0_INTAGG_STATUS_RAW

I have noticed that the searchability on some PDFs is lacking at times so recommend to use stronger strings when possible like "INTAGG" - those tend to produce good results consistently. That said it's entirely unclear to search "ERRAGG" as another one.

Will Gao said:

2). Is the workaround implemented in our SDK? Or need customer to implement it by themselves. 

I'll have to defer to our SDK team on this.

Best Regards,

Ralph Jacobi

Hi Ashwin and Ralph, 

Thanks for your confirmation.