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AM2431: Where to find Documentation on the BISTs of AM243x?

Friedrich Janus
Intellectual 290 points
Part Number: AM2431

Hello!

Where can I find a detailed description about the BISTs of the AM243x, especially the BISTs that can be executed over the R5F CPUs and their memories? How to invoke, sideeffects, which parameters, chunk sizes, ...? I tried the TRM of the AM243x. There are references to some BIST registers but there is no special description.

Who can help me out? Thanx

  • 0
    TI__Guru 54905 points

    Hi Friedrich,

    The BIST is part of the SDL (Software Diagnostic Library) in the AM243x MCU+ SDK 09.00.00.35. Please refer to the following URL for details:

    AM243x MCU+ SDK: PBIST (ti.com)

    There is a BIST example at C:\ti\mcu_plus_sdk_am243x_09_00_00_35\examples\sdl\pbist\pbist_mpu

    Best regards,

    Ming

  • 0 in reply to Ming Wei
    Intellectual 290 points

    After reading the docu about SDL and BISTs in the AM243x MCU+ SDK V9 I understand the follwing:

    The BISTs are designed this way, that they are normally executed after reset during the boot-up.

    The BISTs habe to be started by a different instance as the tested one, so if the R5F cores shall be testet that could be done by the C4M instance.

    The BISTs check some internal functions of the cores (i.e.R5F in this case) as well as memories. After the tests they come back with a pos/neg result.

    The BISTs can be started also during the application running on the R5F cores but this would require to bring the application into a known state as the tests are destructive. It is not clear whether the memory contents are destroyed during this test. It is not clear what shall be saved and what shall be reinstalled if such a procedure is used during the running application (e.g. between two fieldbus cycles). It is not clear which time the test require for execution.

    It is not understood whether the BISTs can be limited to test only parts of the core or memories and how to do this.

    From the SDL we can see that there are some ECC and MCRC possibilites but these are not comparable to any memory test like Galpat or similar.

    Please correct me if I understood wrong.

    rgds

    Friedrich

  • +1 in reply to Friedrich Janus
    TI__Guru 54905 points

    Hi Friedrich,

    Your understanding about the BIST is mostly correct, except the BIST tests can be triggered by instance and type of test to run:

    The BIST is more designed for detecting the permanent errors in the control logic or memory.

    The ECC on the other hand is more designed for detecting the random errors for certain devices, like DDR, flash etc.

    Best regards,

    Ming

  • 0 in reply to Ming Wei
    Intellectual 290 points

    Good morning Ming Wei.

    Is there any documentation how long time the BISTs take? How about context-save and restore, any documentation about this?

    rgds

  • 0 in reply to Friedrich Janus
    TI__Guru 54905 points

    Hi Friedrich,

    Unfortunately, I do not have any documentation for how long the BISTs take.

    Best regards,

    Ming