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LP-AM243: FPU registers in Register view of CCS

Part Number: LP-AM243

Hello,

I'm debugging the MAIN_Cortex_R5_0_0 of the AM243x using CCS 12.4.0.00007. I would like to examine the values of the data registers D0-D15 of the FPU in the Register view, but I'm unable to locate them. Could you tell me, where I can find these registers in the Register view?

As a side question, does the R5 cores of the SoC utilize a FPU with 16 double-precision registers (VFPv3-D16) or 32 double-precision registers (VFPv3)?

Best regards

  • Hello Philipp,

    I would like to examine the values of the data registers D0-D15 of the FPU in the Register view, but I'm unable to locate them. Could you tell me, where I can find these registers in the Register view?

    These registers are not exposed in the Register view.

    As a side question, does the R5 cores of the SoC utilize a FPU with 16 double-precision registers (VFPv3-D16) or 32 double-precision registers (VFPv3)?

    The FPU used for the Cortex R5F is VFPv3. This is documented on Page 2853 of the TRM.

    Best Regards,

    Ralph Jacobi

  • Hello Ralph,

    are there any plans to add the R5 FPU registers to the Register view?

    I also read that the R5 cores use a VFPv3, but I experienced something different. I tried to access D16 via VMOV and this instruction lead to an UNDEF exception. This indicates to me that the FPU only has 16 double-precision registers.

    Best regards

  • Hello Phillip,

    are there any plans to add the R5 FPU registers to the Register view?

    Not at this time.

    I also read that the R5 cores use a VFPv3, but I experienced something different. I tried to access D16 via VMOV and this instruction lead to an UNDEF exception. This indicates to me that the FPU only has 16 double-precision registers.

    I can try to inquire about this but the experts who would be able to speak to this will be out until Wednesday due to local holiday so it will take some time to get feedback.

    Best Regards,

    Ralph Jacobi

  • Hello Phillip,

    are there any plans to add the R5 FPU registers to the Register view?

    Not at this time.

    I also read that the R5 cores use a VFPv3, but I experienced something different. I tried to access D16 via VMOV and this instruction lead to an UNDEF exception. This indicates to me that the FPU only has 16 double-precision registers.

    I can try to inquire about this but the experts who would be able to speak to this will be out until Wednesday due to local holiday so it will take some time to get feedback.

    Best Regards,

    Ralph Jacobi

  • Hi Phillip,

    I have some queries out about this and will push to get feedback here. I'll plan to give you another update by Tuesday.

    Best Regards,

    Ralph Jacobi

  • Hi Phillip,

    Sorry for the lack of progress here, I'm still working this actively. I'm trying hard to get a concrete answer this week and will plan to update Friday or sooner accordingly.

    Best Regards,

    Ralph Jacobi

  • Hi Philipp,

    I got confirmation that our documentation is not complete and the specific version of the FPU used is VFPv3-D16.

    It comes with all features expected in the VFPv3 FPU but only has 16 64-bit FPU registers.

    I have submitted a ticket to get this clarified in the Technical Reference Manual moving forward. Thanks for your patience here and I hope this has resolved the last remaining question.

    Best Regards,

    Ralph Jacobi