RM57L843: How to catch ECC flash errors

Hello Marcio,

Our expert for this topic is out on local holiday and will be back on Wednesday, please wait for their feedback until then, thank you.

Best Regards,

Ralph Jacobi

Hi Marcio,

The RM57L843 microcontrollers protect all accesses to the on-chip flash memory and SRAM memory by dedicated Single-Error-Correction-Double-Error-Detection (SECDED) logic. The SECDED logic implementations use ECC for correcting single-bit errors and for detecting multiple-bit errors in the values read from the Flash or SRAM. The SECDED logic inside the CPU enabled by default after RESET.

So, any read by CPU to invalid ECC location will cause ESM flags to be SET.

So, we should just need to monitor the corresponding ESM flags to find out the ECC errors.

ESM 1.4 (1-bit ECC error) or ESM 2.3 (2-bit ECC error).

(+) TMS570LC4357: Relationship of ESM errors 2.3, 2.19, 2.21 and 1.4, 1.6 - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

(+) TMS570LC4357 EPC Non-correctable error and speculative fetch - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

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Thanks & regards,
Jagadish.

Thanks for your responses.

I am a little bit confused because:

a/ the first referred post says: "Uncorrectable ECC errors in reading Flash or RAM will only set ESM2.3.

b/ the second referred post says: "ESM 1.4 and ESM 2.21 are EPC correctable and uncorrectable errors."

c/ and your post says:  “ESM 1.4 (1-bit ECC error) or ESM 2.3 (2-bit ECC error).”

I've built a test project with ESM 1.4 enabled. Group 2 does not need to be enabled. Flashed a binary without ECC in the LaunchPad. Run it with the emulator. And do not the flash ECC error.  The project is attached. What is missing?

4150.DCC_TEST_RM57.ZIP

Best regards, 

Hello,

Any news about this issue? I haven´t succeed to make the flash ECC generate an error exception (any one).

Regards,

Marcio