RM57L843: ESM registers bits and channels

Hi Marcio,

We just need to verify the TRM and datasheet combinedly to find out the bit number in ESM registers.

For example:

In TRM, at below section they clearly mention the ESM registers and corresponding ESM channel bits.

So according to above section:

1. ESMILSR1[31:0], ESMILCR1[31:0] and ESMSR1[31:0] will be used for Group1(Chennel 31:0).

That means bit-0 is for Group1 channel-0 and bit-1 for the Group1 channel-1 and so on.

2. ESMIEPSR4[31:0], ESMIEPCR4[31:0], ESMIESR4[31:0], ESMIECR4[31:0], ESMILSR4[31:0], ESMILCR4[31:0] and ESMSR4[31:0] will be used for Group1(Chennel 32:63).

That means bit-0 is for Group1 channel-32 and bit-1 for the Group1 channel-33 and so on.

3. ESMIEPSR7[31:0], ESMIEPCR7[31:0], ESMIESR7[31:0], ESMIECR7[31:0], ESMILSR7[31:0], ESMILCR7[31:0] and ESMSR7[31:0] will be used for Group1(Chennel 64:95).

That means bit-0 is for Group1 channel-64 and bit-1 for the Group1 channel-65 and so on.

4. ESMSR2[31:0] will be used for Group2(Chennel 31:0).

That means bit-0 is for Group2 channel-0 and bit-1 for the Group2 channel-1 and so on.

5. ESMSR3[31:0] will be used for Group3(Chennel 31:0).

That means bit-0 is for Group3 channel-0 and bit-1 for the Group3 channel-1 and so on.

So now to find out what is each channel significance, we have to refer the datasheet ESM Channel Assignments section:

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Thanks & regards,
Jagadish.

Thanks for the responses Jagadish.

Could you please tell whether the following indications belong to the class of correctable errors?
Group 1 - Channel 08: HTU1/HTU2 - Parity Error
Group 1 - Channel 09: HTU1/HTU2 - MPU
Group 1 - Channel 19: MibADC1 - Parity Error
Group 1 - Channel 34: NHET2 - Parity Error
Group 1 - Channel 53: CPU Interconnect Subsystem - Global Parity Error
Group 1 - Channel 70 - DMA - Transaction Bus Parity Error
Group 2 - Channel 17: L2FMC - Parity Error
Group 3 - Channel 15: L2RAMW - Address/Control Parity Error

Is the following indication is set during normal operation or only when performing the diagnostic of the detection mechanisms?
Group 1 - Channel 31: CCMR5F - CPU Compare Self-Test Error

What are the meaning of these indications?
Group 1 - Channel 92: CCMR5F - Operating Status
Group 2 - Channel 24: RTI_WWD_NMI

Best regards,

Marcio.

Hi Marcio,

Apologies for the delay in my response.

Marcio Borges said:

Could you please tell whether the following indications belong to the class of correctable errors?

Parity and ECC both are different.

The main difference is that ECC errors can be correctable if there are single bit errors, but parity will only use for error detection and correction is not possible.

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Thanks & regards,
Jagadish.

Thanks for your response about the parity.

What about the other 2 questions? 

Is the following indication is set during normal operation or only when performing the diagnostic of the detection mechanisms?
Group 1 - Channel 31: CCMR5F - CPU Compare Self-Test Error

What are the meaning of these indications?
Group 1 - Channel 92: CCMR5F - Operating Status
Group 2 - Channel 24: RTI_WWD_NMI