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MSPM0L1305: High-Z state of MCU IO pins while driving NRST low for a long period of time

Part Number: MSPM0L1305

Dear TI community and support staff,

We are considering the MSPM0L1305 MCU in one of our products.

Currently, we are investigating an in-system test procedure we need to run after PCBA of our product.

The MCU (master) is connected to an I2C sensor (slave). During the in-system test we want to electrically connect to the I2C-Bus via a needle adapter and directly communicate with the I2C interface (master) from our testing equipment. Therefore we have to disable the MCU's I2C pins / IO pins by setting them high-Z (so they cannot interfere).

To be independent of the firmware development, it would be most easy, to set the MCU into reset state by pulling NRST low via the same needle adapter during our testing procedure (several minutes in duration), during which the IO ports would be set high-Z.

Sadly, the datasheet is not clear about whether the pin driving mode is guaranteed to be reset while NRST is kept low for a long period of time: There might be a loop before entering the System Reset stage.

Could you please clarify?

Best regards
Markus Wegmann

  • Hey Markus,

    I could not find clear definition in the Datasheet/TRM either of what happens during reset.  Looking back at our MSP430 family, it also doesn't to appear something we've ever defined. 

    If I had to guess, I also think it will Hi-Z all the pins as this would always be the safest power-up state, but you might just have to try it.  It'll basically come down to the IOMUX as it's what's connecting the I2C peripheral to the actual output pins, and the IOMUX default state after a reset is Hi-Z.

    Let us know how it goes. 

    Thanks,

    JD

  • Many thanks JD for checking.
    We also have the means to do a full Power-Cycle. So to guarantee a high-z state, we will also want to power cycle the MCU when applying NRST low before running our test procedure.

    Best regards
    Markus