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LP-MSPM0G3507: Configure DMA block mode to step through array of blocks

Alan
Prodigy 155 points
Part Number: LP-MSPM0G3507


I'd like to use a DMA channel to update TIMA0 LOAD and CC_01 registers on each ZERO event to generate a specific PWM waveform.

I have the timer configured, and the DMA set up to perform 3 word-sized transfers each event, and the source address points to an array that has [ LOAD_val0, 0, CC_01_val0, LOAD_val1, 0, CC_01_val1, ... LOAD_valn, 0, CC_01_valn ]. (The dummy 0's are to fill the gap between registers). The destination address points to LOAD and increments word-wise. I can see that the first set of values get transferred by DMA after the first ZERO event.

However, I'm not sure if there's a way to configure the DMA source address to move onto the next block of settings for the next ZERO event. I'd like the next transfer to start at LOAD_val1, when I think it's actually being set back to LOAD_val0 each time causing every subsequent pulse to have the same timings.

Is there a setting to allow a block transfer to step through an array of blocks rather than repeating the same one each time? Or do I need to use a second DMA channel to reconfigure the first each time? Or have I missed some other way of updating TIMA?

  • 0
    TI__Guru 56685 points

    Hello Alan,

    You should be able to use the "Source Address Increment " to increment the initial source address to the next array, assuming they are next to each other in memory.

    Otherwise, using a second DMA channel triggered after the first is complete, to change source address could be an option. Or possibly using TABLE mode in an interesting way. 

  • 0 in reply to Jace H
    Prodigy 155 points

    Thanks for the suggestions.  I'd read "Source Address Increment" as being required to step between the three words that make up a single configuration, but it sounds like you're saying this should actually cause it to step on by a single word after the end of the first transfer to set up the second transfer?  The data sheet refers to DMASRCINCR causing DMASA to increment after every transfer, but then the definition of (repeated) block mode says that DMASA "is restored to its initial value" after each block, ready for the next block.  This suggests that it will end up pointing back to LOAD_val0 at the start of the second transfer, instead of LOAD_val1 as I need.  Have I understood that correctly?

    While table mode "in an interesting way" looks like a fun experiment, I still come up against the problem that I need to step on through the table after each block, so I'm going to leave that one until I understand DMA channels a bit better.

    Unless I've misunderstood how to configure a single channel to do what I need, I think I need to get to grips with using DMA to reconfigure DMA...

  • 0 in reply to Jace H
    Prodigy 155 points

    I tried setting up Source Address Increment in block mode, and sure enough I could see that the source address was left pointing to LOAD_val1 after the first transfer.  However, the channel was left disabled.  If I changed it to operate in repeated block mode, the channel remained enabled but the source address was configured back to LOAD_val0 after each block.

    Should I be able to get a mix of this behaviour - that the DMA channel be left enabled after a transfer, but not have the source address placed back at the start of the table?

  • 0 in reply to Alan
    TI__Guru 56685 points

    Alan,

    Unfortunately your exact scenario is not possible with the standard DMA options. On Single mode, the DMa is turned disabled after the transfer, and needs the Source address re-primed. On REpeat mode, DMA is kept enabled, and the Source address is reset. At that point before your next trigger, you'll need to change your Source address to advance to the next block. Using a 2nd DMA channel as discussed earlier, is probably the best path forward.