TM4C1294KCPDT: EPI General Parallel GPIO

/**
 * main.c
 */

// Compiler headers
#include <stdbool.h>
#include <stdint.h>
#include <string.h>

// Tivaware headers
#include <inc/hw_memmap.h>
#include <inc/hw_epi.h>
#include <inc/hw_ints.h>
#include <inc/hw_types.h>
#include <driverlib/pin_map.h>
#include <driverlib/sysctl.h>
#include <driverlib/gpio.h>
#include <driverlib/rom.h>
#include <driverlib/rom_map.h>
#include <driverlib/epi.h>
#include <driverlib/sysctl.h>
 
// Application specific headers
#include "epiTestPinMap.h"

/******************************************************************************/
/*                          PRE-PROCESSOR DIRECTIVE(S)                        */
/******************************************************************************/
//#define BIT_BANG

/******************************************************************************/
/*                     GLOBAL MODULE SPECIFIC ENUMERATION(S)                  */
/******************************************************************************/
enum outputStateChange_e	// List of available update output commands 
{
	DISABLE_OUTPUT = 0,		// Disable specified output pin
	ENABLE_OUTPUT,			// Enable specified output pin
	TOGGLE_OUTPUT			// Toggle specified output pin
};

/******************************************************************************/
/*                      LOCAL MODULE SPECIFIC DEFINITION(S)                   */
/******************************************************************************/
#define EPI_PORT 	( 0xA0000000 )	// Address assigned to the EPI port

/******************************************************************************/
/*                       LOCAL MODULE SPECIFIC CONSTANT(S)                    */
/******************************************************************************/
const uint32_t EPI_DATA_PATTERN[ 2 ] =
{
	0xAA55AA55,
	0x55AA55AA
};

/******************************************************************************/
/*                              GLOBAL VARIABLES                              */
/******************************************************************************/
uint32_t  m_sysClockFreq;	// Master system clock frequency

/******************************************************************************/
/*                           FUNCTION DECLERATIONS                            */
/******************************************************************************/
static void configGeneralPurposeIOPins( void );
static void enablePeripheral( uint32_t );
static void initGPOutput( uint32_t, uint8_t, uint8_t );
static void configEPIPeripheral( void );
static void configEPIBusPins( void );
static void testEPI( void );
static void updateOutputState( uint32_t, uint8_t, enum outputStateChange_e );

/******************************************************************************/
/*                                     MAIN                                   */
/******************************************************************************/
/*                                                                            */
/* Description : This function is the main program.                           */
/*                                                                            */
/*============================================================================*/
/* Notes       : None                                                         */
/*                                                                            */
/******************************************************************************/
int main( void )
{	
	m_sysClockFreq = MAP_SysCtlClockFreqSet( (SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_240), MASTER_CLOCK_FREQUENCY );	// Run from the PLL at 120 MHz

	configGeneralPurposeIOPins( );	// Configure all the general purpose I/O pins
	configEPIPeripheral( );			// Configure EPI communications peripheral
	
	testEPI( );						// Call routine to test EPI communications
}

/******************************************************************************/
/*                CONFIGURE GENERAL PURPOSE INPUT/OUTPUT PINS                 */
/******************************************************************************/
/*                                                                            */
/* Description : This function configures the general purpose input/output    */
/*               pins.                                                        */
/*                                                                            */
/*============================================================================*/
/* Notes       : Unused pins are configured as inputs.                        */
/*                                                                            */
/******************************************************************************/
static void configGeneralPurposeIOPins( void )
{	
	enablePeripheral( SYSCTL_PERIPH_GPIOA );											// Enable GPIO port A peripheral
	initGPOutput( GPIO_PORTA_BASE, PORT_A_GPIO_OUTPUTS, 0 );							// Call routine to configure the port A general purpose output pins

	enablePeripheral( SYSCTL_PERIPH_GPIOF );											// Enable GPIO port F peripheral
	initGPOutput( GPIO_PORTF_BASE, PORT_F_GPIO_OUTPUTS, 0 );							// Call routine to configure the port F general purpose output pins

	enablePeripheral( SYSCTL_PERIPH_GPIOJ );											// Enable GPIO port J peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTJ_BASE, PORT_J_GPIO_INPUTS ); 					// Configure port J input pins
	
	enablePeripheral( SYSCTL_PERIPH_GPIOK );											// Enable GPIO port K peripheral
	initGPOutput( GPIO_PORTK_BASE, PORT_K_GPIO_OUTPUTS, 0 );							// Call routine to configure the port K general purpose output pins
	
	enablePeripheral( SYSCTL_PERIPH_GPIOL );											// Enable GPIO port L peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTL_BASE, INPUT_FPGA_DONE_PL5 ); 					// Configure port L input pin
	
	enablePeripheral( SYSCTL_PERIPH_GPIOM );											// Enable GPIO port M peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTM_BASE, INPUT_FPGA_STALL_PM6 ); 					// Configure port M input pin
	MAP_GPIOPinTypeGPIOOutputOD( GPIO_PORTM_BASE, OUTPUT_FPGA_RESET_PM7 ); 				// Configure FPGA reset as a open drain output, externally pulled up
	MAP_GPIOPinWrite( GPIO_PORTM_BASE, OUTPUT_FPGA_RESET_PM7, OUTPUT_FPGA_RESET_PM7 );	// Clear FPGA reset, allow to run
	initGPOutput( GPIO_PORTM_BASE, PORT_M_GPIO_OUTPUTS, 0 );							// Call routine to configure the port M general purpose output pins
	
	enablePeripheral( SYSCTL_PERIPH_GPION );											// Enable GPIO port N peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTN_BASE, INPUT_EPI0_WRT_ACK_PN5 ); 				// Configure port N input pin
	initGPOutput( GPIO_PORTN_BASE, PORT_N_GPIO_OUTPUTS, 0 );							// Call routine to configure the port N general purpose output pins
	
	enablePeripheral( SYSCTL_PERIPH_GPIOP );											// Enable GPIO port P peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTP_BASE, PORT_P_GPIO_INPUTS ); 					// Configure port P input pins
	
	enablePeripheral( SYSCTL_PERIPH_GPIOQ );											// Enable GPIO port Q peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTQ_BASE, INPUT_IO_EXPANDER_INT_PQ4 ); 			// Configure port Q interrupt input pin	
}

/******************************************************************************/
/*                              ENABLE PERIPHERAL                             */
/******************************************************************************/
/*                                                                            */
/* Description : This function enables specified peripheral.                  */
/*                                                                            */
/*============================================================================*/
/* Notes       :                                                              */
/*                                                                            */
/******************************************************************************/
static void enablePeripheral( uint32_t peripheralId )
{
	MAP_SysCtlPeripheralEnable( peripheralId );				// Enable the requested peripheral
	while( ! MAP_SysCtlPeripheralReady( peripheralId ) );	// Wait for requested peripheral to be ready
}

/******************************************************************************/
/*                      CONFIGURE GENERAL PURPOSE OUTPUTS                     */
/******************************************************************************/
/*                                                                            */
/* Description : This function configures the requested ports general purpose */
/*               output pins.                                                 */
/*                                                                            */
/*============================================================================*/
/* Notes       :                                                              */
/*                                                                            */
/******************************************************************************/
static void initGPOutput( uint32_t port, uint8_t pins, uint8_t initState )
{
	MAP_GPIOPinTypeGPIOOutput( port, pins ); 	// Configure specified port input pins
	MAP_GPIOPinWrite( port, pins, initState );	// Set specified port output to default state
}

/******************************************************************************/
/*                          CONFIGURE EPI PERIPHERAL                          */
/******************************************************************************/
/*                                                                            */
/* Description : This function configures the EPI peripheral.                 */
/*                                                                            */
/*============================================================================*/
/* Notes       :                                                              */
/*                                                                            */
/******************************************************************************/
static void configEPIPeripheral( void )
{
#ifdef BIT_BANG	
	enablePeripheral( SYSCTL_PERIPH_GPIOA );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTA_BASE, PORT_A_EPI_PINS ); 							// Configure port A EPI pins as input
	
	enablePeripheral( SYSCTL_PERIPH_GPIOB );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTB_BASE, PORT_B_EPI_PINS ); 							// Configure port B EPI pins as input

	enablePeripheral( SYSCTL_PERIPH_GPIOC );												// Call routine to enable port D GPIO
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTC_BASE, PORT_C_EPI_PINS ); 							// Configure port C EPI pins as input
	
	enablePeripheral( SYSCTL_PERIPH_GPIOG );												// Call routine to enable port D GPIO
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTG_BASE, PORT_G_EPI_PINS ); 							// Configure port G EPI pins as input

	enablePeripheral( SYSCTL_PERIPH_GPIOH );												// Call routine to enable port D GPIO
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTH_BASE, PORT_H_EPI_PINS ); 							// Configure port H EPI pins as input
	
	enablePeripheral( SYSCTL_PERIPH_GPIOK );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTK_BASE, PORT_K_EPI_PINS ); 							// Configure port K EPI pins as input
	enablePeripheral( SYSCTL_PERIPH_GPIOL );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTL_BASE, PORT_L_EPI_PINS ); 							// Configure port L EPI pins as input
	enablePeripheral( SYSCTL_PERIPH_GPIOM );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTM_BASE, PORT_M_EPI_PINS ); 							// Configure port M EPI pins as input
	enablePeripheral( SYSCTL_PERIPH_GPIOP );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTP_BASE, PORT_P_EPI_PINS ); 							// Configure port P EPI pins as input
	enablePeripheral( SYSCTL_PERIPH_GPIOQ );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTQ_BASE, PORT_Q_EPI_PINS ); 							// Configure port Q EPI pins as input	
#else
	enablePeripheral( SYSCTL_PERIPH_EPI0 );													// Call routine to enable EPI peripheral
	configEPIBusPins( );																	// Call routine to configure EPI bus pins
	
	MAP_EPIModeSet( EPI0_BASE, EPI_MODE_GENERAL );											// Set mode to general purpose to interface with FPGA
	MAP_EPIDividerSet( EPI0_BASE, 2 );														// Check whether required.
	MAP_EPIConfigGPModeSet( EPI0_BASE, EPI_GPMODE_CLKPIN | EPI_GPMODE_DSIZE_32, 0, 0 );		// No Clock out, No address, 32bit
//	MAP_EPIConfigGPModeSet( EPI0_BASE, EPI_GPMODE_ASIZE_NONE | EPI_GPMODE_DSIZE_32, 0, 0 );	// No Clock out, No address, 32bit

//	MAP_EPIAddressMapSet( EPI0_BASE, EPI_ADDR_CODE_BASE_NONE );  							// Address map to 0xA000.0000
	MAP_EPIAddressMapSet( EPI0_BASE, EPI_ADDR_PER_BASE_A );  								// Address map to 0xA000.0000
#endif	
}

/******************************************************************************/
/*                            CONFIGURE EPI BUS PINS                          */
/******************************************************************************/
/*                                                                            */
/* Description : This function configures the pins used for the extended      */
/*               peripheral interface bus.                                    */
/*                                                                            */
/*============================================================================*/
/* Notes       : Provides a 32-bit communications to receive data from the    */
/*               FPGA.                                                        */
/*                                                                            */
/******************************************************************************/
static void configEPIBusPins( void )
{
    enablePeripheral( SYSCTL_PERIPH_GPIOA );                // Call routine to enable port C GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTA_BASE, PORT_A_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( GPIO_PA6_EPI0S8 );       			// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PA7_EPI0S9 );       			// Assign individual port pin to EPI bus

	enablePeripheral( SYSCTL_PERIPH_GPIOB );                // Call routine to enable port C GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTB_BASE, PORT_B_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( EPI0_SIGNAL_27_PB2 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_28_PB3 );       		// Assign individual port pin to EPI bus
	
	enablePeripheral( SYSCTL_PERIPH_GPIOC );				// Call routine to enable port C GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTC_BASE, PORT_C_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( EPI0_SIGNAL_7_PC4 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_6_PC5 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_5_PC6 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_4_PC7 );       		// Assign individual port pin to EPI bus
	
	enablePeripheral( SYSCTL_PERIPH_GPIOG );				// Call routine to enable port G GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTG_BASE, PORT_G_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( EPI0_SIGNAL_11_PG0 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_10_PG1 );       		// Assign individual port pin to EPI bus
	
	enablePeripheral( SYSCTL_PERIPH_GPIOH );				// Call routine to enable port H GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTH_BASE, PORT_H_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( EPI0_SIGNAL_0_PH0 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_1_PH1 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_2_PH2 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_3_PH3 );       		// Assign individual port pin to EPI bus
    
	enablePeripheral( SYSCTL_PERIPH_GPIOK );                // Call routine to enable port C GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTK_BASE, PORT_K_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( EPI0_SIGNAL_31_PK5 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_25_PK6 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_24_PK7 );       		// Assign individual port pin to EPI bus
	
	enablePeripheral( SYSCTL_PERIPH_GPIOL );                // Call routine to enable port C GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTL_BASE, PORT_L_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( EPI0_SIGNAL_16_PL0 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_17_PL1 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_18_PL2 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_19_PL3 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_26_PL4 );       		// Assign individual port pin to EPI bus
	
	enablePeripheral( SYSCTL_PERIPH_GPIOM );                // Call routine to enable port C GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTM_BASE, PORT_M_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( EPI0_SIGNAL_15_PM0 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_14_PM1 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_13_PM2 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_12_PM3 );       		// Assign individual port pin to EPI bus
    
	enablePeripheral( SYSCTL_PERIPH_GPIOP );                // Call routine to enable port C GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTP_BASE, PORT_P_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( EPI0_SIGNAL_29_PP2 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_30_PP3 );       		// Assign individual port pin to EPI bus

	enablePeripheral( SYSCTL_PERIPH_GPIOQ );                // Call routine to enable port C GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTQ_BASE, PORT_Q_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( EPI0_SIGNAL_20_PQ0 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_21_PQ1 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_22_PQ2 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( EPI0_SIGNAL_23_PQ3 );       		// Assign individual port pin to EPI bus
}

/******************************************************************************/
/*                                TEST EPI BUS                                */
/******************************************************************************/
/*                                                                            */
/* Description : This function tests receiving FPGA data on the EPI bus.      */
/*                                                                            */
/*============================================================================*/
/* Notes       :                                                              */
/*                                                                            */
/******************************************************************************/
static void testEPI( void )
{
	uint32_t inx,
#ifdef BIT_BANG
	        inputPins,
#endif
	         epiData;

	for( inx = 0 ; inx < 100 ; inx++ )
	{
		updateOutputState( GPIO_PORTM_BASE, OUTPUT_EPI0_CTS_PM5, ENABLE_OUTPUT );			// Set read ack to false while reading data

		while( ! MAP_GPIOPinRead( GPIO_PORTP_BASE, INPUT_EPI0_RTS_INT_PP0 ) );				// Wait for FPGA to indicate data ready to read

		updateOutputState( GPIO_PORTM_BASE, OUTPUT_EPI0_CTS_PM5, DISABLE_OUTPUT );			// Set read ack to false while reading data

#ifdef BIT_BANG
		epiData = MAP_GPIOPinRead( GPIO_PORTA_BASE, PORT_A_EPI_PINS ) << 2;					// Read the port A EPI input pins
		epiData |= MAP_GPIOPinRead( GPIO_PORTB_BASE, PORT_B_EPI_PINS ) << 25;				// Read the port B EPI input pins
		epiData |= __rbit( MAP_GPIOPinRead( GPIO_PORTC_BASE, PORT_C_EPI_PINS ) ) >> 20; 	// Read the port C EPI input pins
		epiData |= __rbit( MAP_GPIOPinRead( GPIO_PORTG_BASE, PORT_G_EPI_PINS ) ) >> 20; 	// Read the port G EPI input pins
		epiData |= MAP_GPIOPinRead( GPIO_PORTH_BASE, PORT_H_EPI_PINS );						// Read the port H EPI input pins

		inputPins = MAP_GPIOPinRead( GPIO_PORTK_BASE, PORT_K_EPI_PINS );					// Read the port K EPI input pins
		epiData |= (inputPins & 0x00000020) << 26;											// Mask off bit 5 and load bit into position 31
		epiData |= (inputPins & 0x00000080) << 17;                                      	// Mask off bit 7 and load bit into position 24
        epiData |= (inputPins & 0x00000040) << 19;                                      	// Mask off bit 6 and load bit into position 25

		inputPins = MAP_GPIOPinRead( GPIO_PORTL_BASE, PORT_L_EPI_PINS );					// Read the port L EPI input pins
		epiData |= (inputPins & 0x0000000F) << 16;                                    		// Load bits 0 - 3 into positions 16 - 19  
		epiData |= (inputPins & 0x00000010) << 22;                                    		// Load bit 4 into position 22

		epiData |= __rbit( MAP_GPIOPinRead( GPIO_PORTM_BASE, PORT_M_EPI_PINS ) ) >> 16;		// Read the port M EPI input pins
		epiData |= MAP_GPIOPinRead( GPIO_PORTP_BASE, PORT_P_EPI_PINS ) << 27;				// Read the port P EPI input pins
        epiData |= MAP_GPIOPinRead( GPIO_PORTQ_BASE, PORT_Q_EPI_PINS ) << 20;           	// Read the port Q EPI input pins
#else
//        epiData = HWREG( 0x400D0070 );                                                  	// Read the FPGA data from EPI bus
        epiData = HWREG( EPI_PORT );                                                  	// Read the FPGA data from EPI bus
#endif
        updateOutputState( GPIO_PORTN_BASE, OUTPUT_EPI0_READ_DONE_PN4, ENABLE_OUTPUT );    	// Initialize read ack to true

        while( MAP_GPIOPinRead( GPIO_PORTP_BASE, INPUT_EPI0_RTS_INT_PP0 ) );            	// Wait for FPGA to indicate data cleared

        updateOutputState( GPIO_PORTN_BASE, OUTPUT_EPI0_READ_DONE_PN4, DISABLE_OUTPUT );   	// Initialize read ack to true

		if( epiData != EPI_DATA_PATTERN[ inx % 2 ] )										// If the EPI data doesn't match the expected value
		    epiData = epiData;																// Breakpoint to check for errors
	}
}

/******************************************************************************/
/*                             UPDATE OUTPUT STATE                            */
/******************************************************************************/
/*                                                                            */
/* Description : This function updates the specified pin state.               */
/*                                                                            */
/*============================================================================*/
/* Notes       :                                                              */
/*                                                                            */
/******************************************************************************/
static void updateOutputState( uint32_t port, uint8_t pin, enum outputStateChange_e action )
{
	uint8_t state;
	
	state = MAP_GPIOPinRead( port, pin );	// Read current pin state
	switch( action )						// Branch based on the requested action
	{
		case DISABLE_OUTPUT :				// If request to disable the specified output
			state &= ~pin;					// Clear requested pin state
			break;
		case ENABLE_OUTPUT  :				// If request to enable the specified output
			state |= pin;					// Set requested pin state
			break;
		case TOGGLE_OUTPUT  :				// If request to toggle the specified output
			state ^= pin;					// Toggle the specified pin state
			break;
	}
	MAP_GPIOPinWrite( port, pin, state );	// Set specified port output to default state
}

/**
 * main.c
 */

// Compiler headers
#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#include <math.h>

// Tivaware headers
//#include <inc/tm4c1294kcpdt.h>
#include <inc/hw_memmap.h>
#include <inc/hw_epi.h>
#include <inc/hw_ints.h>
#include <inc/hw_types.h>
#include <inc/hw_i2c.h>
#include <driverlib/pin_map.h>
#include <driverlib/sysctl.h>
#include <driverlib/gpio.h>
#include <driverlib/rom.h>
#include <driverlib/rom_map.h>
#include <driverlib/epi.h>
#include <driverlib/i2c.h>
#include <driverlib/ssi.h>
#include <driverlib/sysctl.h>
#include <driverlib/interrupt.h>
#include <driverlib/adc.h>
#include <driverlib/uart.h>
#include <driverlib/watchdog.h>
#include <driverlib/crc.h>
#include <utils/uartstdio.h>
 
// Application specific headers
#include "epiTestPinMap.h"

/******************************************************************************/
/*                          PRE-PROCESSOR DIRECTIVE(S)                        */
/******************************************************************************/
//#define BIT_BANG

/******************************************************************************/
/*                     GLOBAL MODULE SPECIFIC ENUMERATION(S)                  */
/******************************************************************************/
enum outputStateChange_e	// List of available update output commands 
{
	DISABLE_OUTPUT = 0,		// Disable specified output pin
	ENABLE_OUTPUT,			// Enable specified output pin
	TOGGLE_OUTPUT			// Toggle specified output pin
};

/******************************************************************************/
/*                      LOCAL MODULE SPECIFIC DEFINITION(S)                   */
/******************************************************************************/
#define EPI_PORT 	( 0xA0000000 )	// Address assigned to the EPI port

/******************************************************************************/
/*                       LOCAL MODULE SPECIFIC CONSTANT(S)                    */
/******************************************************************************/
const uint32_t EPI_DATA_PATTERN[ 2 ] =
{
	0xAA55AA55,
	0x55AA55AA
};

/******************************************************************************/
/*                              GLOBAL VARIABLES                              */
/******************************************************************************/
uint32_t  m_sysClockFreq;	// Master system clock frequency

/******************************************************************************/
/*                           FUNCTION DECLERATIONS                            */
/******************************************************************************/
static void configGeneralPurposeIOPins( void );
static void enablePeripheral( uint32_t );
static void initGPOutput( uint32_t, uint8_t, uint8_t );
static void configEPIPeripheral( void );
static void configEPIBusPins( void );
static void testEPI( void );
static void updateOutputState( uint32_t, uint8_t, enum outputStateChange_e );

/******************************************************************************/
/*                                     MAIN                                   */
/******************************************************************************/
/*                                                                            */
/* Description : This function is the main program.                           */
/*                                                                            */
/*============================================================================*/
/* Notes       : None                                                         */
/*                                                                            */
/******************************************************************************/
int main( void )
{	
	m_sysClockFreq = MAP_SysCtlClockFreqSet( (SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_240), MASTER_CLOCK_FREQUENCY );	// Run from the PLL at 120 MHz

	configGeneralPurposeIOPins( );	// Configure all the general purpose I/O pins
	configEPIPeripheral( );			// Configure EPI communications peripheral
	
	testEPI( );						// Call routine to test EPI communications
}

/******************************************************************************/
/*                CONFIGURE GENERAL PURPOSE INPUT/OUTPUT PINS                 */
/******************************************************************************/
/*                                                                            */
/* Description : This function configures the general purpose input/output    */
/*               pins.                                                        */
/*                                                                            */
/*============================================================================*/
/* Notes       : Unused pins are configured as inputs.                        */
/*                                                                            */
/******************************************************************************/
static void configGeneralPurposeIOPins( void )
{	
	enablePeripheral( SYSCTL_PERIPH_GPIOA );											// Enable GPIO port A peripheral
	initGPOutput( GPIO_PORTA_BASE, PORT_A_GPIO_OUTPUTS, 0 );							// Call routine to configure the port A general purpose output pins

	enablePeripheral( SYSCTL_PERIPH_GPIOF );											// Enable GPIO port F peripheral
	initGPOutput( GPIO_PORTF_BASE, PORT_F_GPIO_OUTPUTS, 0 );							// Call routine to configure the port F general purpose output pins

	enablePeripheral( SYSCTL_PERIPH_GPIOJ );											// Enable GPIO port J peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTJ_BASE, PORT_J_GPIO_INPUTS ); 					// Configure port J input pins
	
	enablePeripheral( SYSCTL_PERIPH_GPIOK );											// Enable GPIO port K peripheral
	initGPOutput( GPIO_PORTK_BASE, PORT_K_GPIO_OUTPUTS, 0 );							// Call routine to configure the port K general purpose output pins
	
	enablePeripheral( SYSCTL_PERIPH_GPIOL );											// Enable GPIO port L peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTL_BASE, INPUT_FPGA_DONE_PL5 ); 					// Configure port L input pin
	
	enablePeripheral( SYSCTL_PERIPH_GPIOM );											// Enable GPIO port M peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTM_BASE, INPUT_FPGA_STALL_PM6 ); 					// Configure port M input pin
	MAP_GPIOPinTypeGPIOOutputOD( GPIO_PORTM_BASE, OUTPUT_FPGA_RESET_PM7 ); 				// Configure FPGA reset as a open drain output, externally pulled up
	MAP_GPIOPinWrite( GPIO_PORTM_BASE, OUTPUT_FPGA_RESET_PM7, OUTPUT_FPGA_RESET_PM7 );	// Clear FPGA reset, allow to run
	initGPOutput( GPIO_PORTM_BASE, PORT_M_GPIO_OUTPUTS, 0 );							// Call routine to configure the port M general purpose output pins
	
	enablePeripheral( SYSCTL_PERIPH_GPION );											// Enable GPIO port N peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTN_BASE, INPUT_EPI0_WRT_ACK_PN5 ); 				// Configure port N input pin
	initGPOutput( GPIO_PORTN_BASE, PORT_N_GPIO_OUTPUTS, 0 );							// Call routine to configure the port N general purpose output pins
	
	enablePeripheral( SYSCTL_PERIPH_GPIOP );											// Enable GPIO port P peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTP_BASE, PORT_P_GPIO_INPUTS ); 					// Configure port P input pins
	
	enablePeripheral( SYSCTL_PERIPH_GPIOQ );											// Enable GPIO port Q peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTQ_BASE, INPUT_IO_EXPANDER_INT_PQ4 ); 			// Configure port Q interrupt input pin	
}

/******************************************************************************/
/*                              ENABLE PERIPHERAL                             */
/******************************************************************************/
/*                                                                            */
/* Description : This function enables specified peripheral.                  */
/*                                                                            */
/*============================================================================*/
/* Notes       :                                                              */
/*                                                                            */
/******************************************************************************/
static void enablePeripheral( uint32_t peripheralId )
{
	MAP_SysCtlPeripheralEnable( peripheralId );				// Enable the requested peripheral
	while( ! MAP_SysCtlPeripheralReady( peripheralId ) );	// Wait for requested peripheral to be ready
}

/******************************************************************************/
/*                      CONFIGURE GENERAL PURPOSE OUTPUTS                     */
/******************************************************************************/
/*                                                                            */
/* Description : This function configures the requested ports general purpose */
/*               output pins.                                                 */
/*                                                                            */
/*============================================================================*/
/* Notes       :                                                              */
/*                                                                            */
/******************************************************************************/
static void initGPOutput( uint32_t port, uint8_t pins, uint8_t initState )
{
	MAP_GPIOPinTypeGPIOOutput( port, pins ); 	// Configure specified port input pins
	MAP_GPIOPinWrite( port, pins, initState );	// Set specified port output to default state
}

/******************************************************************************/
/*                          CONFIGURE EPI PERIPHERAL                          */
/******************************************************************************/
/*                                                                            */
/* Description : This function configures the EPI peripheral.                 */
/*                                                                            */
/*============================================================================*/
/* Notes       :                                                              */
/*                                                                            */
/******************************************************************************/
static void configEPIPeripheral( void )
{
#ifdef BIT_BANG	
	enablePeripheral( SYSCTL_PERIPH_GPIOA );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTA_BASE, PORT_A_EPI_PINS ); 							// Configure port A EPI pins as input
	
	enablePeripheral( SYSCTL_PERIPH_GPIOB );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTB_BASE, PORT_B_EPI_PINS ); 							// Configure port B EPI pins as input

	enablePeripheral( SYSCTL_PERIPH_GPIOC );												// Call routine to enable port D GPIO
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTC_BASE, PORT_C_EPI_PINS ); 							// Configure port C EPI pins as input
	
	enablePeripheral( SYSCTL_PERIPH_GPIOG );												// Call routine to enable port D GPIO
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTG_BASE, PORT_G_EPI_PINS ); 							// Configure port G EPI pins as input

	enablePeripheral( SYSCTL_PERIPH_GPIOH );												// Call routine to enable port D GPIO
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTH_BASE, PORT_H_EPI_PINS ); 							// Configure port H EPI pins as input
	
	enablePeripheral( SYSCTL_PERIPH_GPIOK );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTK_BASE, PORT_K_EPI_PINS ); 							// Configure port K EPI pins as input
	enablePeripheral( SYSCTL_PERIPH_GPIOL );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTL_BASE, PORT_L_EPI_PINS ); 							// Configure port L EPI pins as input
	enablePeripheral( SYSCTL_PERIPH_GPIOM );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTM_BASE, PORT_M_EPI_PINS ); 							// Configure port M EPI pins as input
	enablePeripheral( SYSCTL_PERIPH_GPIOP );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTP_BASE, PORT_P_EPI_PINS ); 							// Configure port P EPI pins as input
	enablePeripheral( SYSCTL_PERIPH_GPIOQ );												// Enable GPIO port A peripheral
	MAP_GPIOPinTypeGPIOInput( GPIO_PORTQ_BASE, PORT_Q_EPI_PINS ); 							// Configure port Q EPI pins as input	
#else
	enablePeripheral( SYSCTL_PERIPH_EPI0 );													// Call routine to enable EPI peripheral
	configEPIBusPins( );																	// Call routine to configure EPI bus pins
	
	MAP_EPIModeSet( EPI0_BASE, EPI_MODE_GENERAL );											// Set mode to general purpose to interface with FPGA
	MAP_EPIDividerSet( EPI0_BASE, 2 );														// Check whether required.
	MAP_EPIConfigGPModeSet( EPI0_BASE, EPI_GPMODE_CLKPIN | EPI_GPMODE_DSIZE_32, 0, 0 );		// No Clock out, No address, 32bit
//	MAP_EPIConfigGPModeSet( EPI0_BASE, EPI_GPMODE_ASIZE_NONE | EPI_GPMODE_DSIZE_32, 0, 0 );	// No Clock out, No address, 32bit

//	MAP_EPIAddressMapSet( EPI0_BASE, EPI_ADDR_CODE_BASE_NONE );  							// Address map to 0xA000.0000
	MAP_EPIAddressMapSet( EPI0_BASE, EPI_ADDR_PER_BASE_A );  								// Address map to 0xA000.0000
#endif	
}

/******************************************************************************/
/*                            CONFIGURE EPI BUS PINS                          */
/******************************************************************************/
/*                                                                            */
/* Description : This function configures the pins used for the extended      */
/*               peripheral interface bus.                                    */
/*                                                                            */
/*============================================================================*/
/* Notes       : Provides a 32-bit communications to receive data from the    */
/*               FPGA.                                                        */
/*                                                                            */
/******************************************************************************/
static void configEPIBusPins( void )
{
    enablePeripheral( SYSCTL_PERIPH_GPIOA );                // Call routine to enable port A GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTA_BASE, PORT_A_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( GPIO_PA6_EPI0S8 );       			// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PA7_EPI0S9 );       			// Assign individual port pin to EPI bus

	enablePeripheral( SYSCTL_PERIPH_GPIOB );                // Call routine to enable port B GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTB_BASE, PORT_B_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( GPIO_PB2_EPI0S27 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PB3_EPI0S28 );       		// Assign individual port pin to EPI bus
	
	enablePeripheral( SYSCTL_PERIPH_GPIOC );				// Call routine to enable port C GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTC_BASE, PORT_C_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( GPIO_PC4_EPI0S7 );       			// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PC5_EPI0S6 );       			// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PC6_EPI0S5 );       			// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PC7_EPI0S4 );       			// Assign individual port pin to EPI bus
	
	enablePeripheral( SYSCTL_PERIPH_GPIOG );				// Call routine to enable port G GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTG_BASE, PORT_G_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( GPIO_PG0_EPI0S11 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PG1_EPI0S10 );       		// Assign individual port pin to EPI bus
	
	enablePeripheral( SYSCTL_PERIPH_GPIOH );				// Call routine to enable port H GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTH_BASE, PORT_H_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( GPIO_PH0_EPI0S0 );       			// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PH1_EPI0S1 );       			// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PH2_EPI0S2 );       			// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PH3_EPI0S3 );       			// Assign individual port pin to EPI bus
    
	enablePeripheral( SYSCTL_PERIPH_GPIOK );                // Call routine to enable port K GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTK_BASE, PORT_K_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( GPIO_PK5_EPI0S31 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PK6_EPI0S25 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PK7_EPI0S24 );       		// Assign individual port pin to EPI bus
	
	enablePeripheral( SYSCTL_PERIPH_GPIOL );                // Call routine to enable port L GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTL_BASE, PORT_L_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( GPIO_PL0_EPI0S16 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PL1_EPI0S17 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PL2_EPI0S18 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PL3_EPI0S19 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PL4_EPI0S26 );       		// Assign individual port pin to EPI bus
	
	enablePeripheral( SYSCTL_PERIPH_GPIOM );                // Call routine to enable port M GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTM_BASE, PORT_M_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( GPIO_PM0_EPI0S15 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PM1_EPI0S14 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PM2_EPI0S13 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PM3_EPI0S12 );       		// Assign individual port pin to EPI bus
    
	enablePeripheral( SYSCTL_PERIPH_GPIOP );                // Call routine to enable port P GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTP_BASE, PORT_P_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( GPIO_PP2_EPI0S29 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PP3_EPI0S30 );       		// Assign individual port pin to EPI bus

	enablePeripheral( SYSCTL_PERIPH_GPIOQ );                // Call routine to enable port Q GPIO
    MAP_GPIOPinTypeEPI( GPIO_PORTQ_BASE, PORT_Q_EPI_PINS );	// Configure requested port EPI pins
    MAP_GPIOPinConfigure( GPIO_PQ0_EPI0S20 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PQ1_EPI0S21 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PQ2_EPI0S22 );       		// Assign individual port pin to EPI bus
    MAP_GPIOPinConfigure( GPIO_PQ3_EPI0S23 );       		// Assign individual port pin to EPI bus
}

/******************************************************************************/
/*                                TEST EPI BUS                                */
/******************************************************************************/
/*                                                                            */
/* Description : This function tests receiving FPGA data on the EPI bus.      */
/*                                                                            */
/*============================================================================*/
/* Notes       :                                                              */
/*                                                                            */
/******************************************************************************/
static void testEPI( void )
{
	uint32_t inx,
#ifdef BIT_BANG
	         inputPins,
#endif
	         epiData;

	for( inx = 0 ; inx < 100 ; inx++ )
	{
		updateOutputState( GPIO_PORTM_BASE, OUTPUT_EPI0_CTS_PM5, ENABLE_OUTPUT );			// Set read ack to false while reading data

		while( ! MAP_GPIOPinRead( GPIO_PORTP_BASE, INPUT_EPI0_RTS_INT_PP0 ) );				// Wait for FPGA to indicate data ready to read

		updateOutputState( GPIO_PORTM_BASE, OUTPUT_EPI0_CTS_PM5, DISABLE_OUTPUT );			// Set read ack to false while reading data

#ifdef BIT_BANG
		epiData = MAP_GPIOPinRead( GPIO_PORTA_BASE, PORT_A_EPI_PINS ) << 2;					// Read the port A EPI input pins
		epiData |= MAP_GPIOPinRead( GPIO_PORTB_BASE, PORT_B_EPI_PINS ) << 25;				// Read the port B EPI input pins
		epiData |= __rbit( MAP_GPIOPinRead( GPIO_PORTC_BASE, PORT_C_EPI_PINS ) ) >> 20; 	// Read the port C EPI input pins
		epiData |= __rbit( MAP_GPIOPinRead( GPIO_PORTG_BASE, PORT_G_EPI_PINS ) ) >> 20; 	// Read the port G EPI input pins
		epiData |= MAP_GPIOPinRead( GPIO_PORTH_BASE, PORT_H_EPI_PINS );						// Read the port H EPI input pins

		inputPins = MAP_GPIOPinRead( GPIO_PORTK_BASE, PORT_K_EPI_PINS );					// Read the port K EPI input pins
		epiData |= (inputPins & 0x00000020) << 26;											// Mask off bit 5 and load bit into position 31
		epiData |= (inputPins & 0x00000080) << 17;                                      	// Mask off bit 7 and load bit into position 24
        epiData |= (inputPins & 0x00000040) << 19;                                      	// Mask off bit 6 and load bit into position 25

		inputPins = MAP_GPIOPinRead( GPIO_PORTL_BASE, PORT_L_EPI_PINS );					// Read the port L EPI input pins
		epiData |= (inputPins & 0x0000000F) << 16;                                    		// Load bits 0 - 3 into positions 16 - 19  
		epiData |= (inputPins & 0x00000010) << 22;                                    		// Load bit 4 into position 22

		epiData |= __rbit( MAP_GPIOPinRead( GPIO_PORTM_BASE, PORT_M_EPI_PINS ) ) >> 16;		// Read the port M EPI input pins
		epiData |= MAP_GPIOPinRead( GPIO_PORTP_BASE, PORT_P_EPI_PINS ) << 27;				// Read the port P EPI input pins
        epiData |= MAP_GPIOPinRead( GPIO_PORTQ_BASE, PORT_Q_EPI_PINS ) << 20;           	// Read the port Q EPI input pins
#else
//        epiData = HWREG( 0x400D0070 );                                                  	// Read the FPGA data from EPI bus
        epiData = HWREG( EPI_PORT );                                                  	// Read the FPGA data from EPI bus
#endif
        updateOutputState( GPIO_PORTN_BASE, OUTPUT_EPI0_READ_DONE_PN4, ENABLE_OUTPUT );    	// Initialize read ack to true

        while( MAP_GPIOPinRead( GPIO_PORTP_BASE, INPUT_EPI0_RTS_INT_PP0 ) );            	// Wait for FPGA to indicate data cleared

        updateOutputState( GPIO_PORTN_BASE, OUTPUT_EPI0_READ_DONE_PN4, DISABLE_OUTPUT );   	// Initialize read ack to true

		if( epiData != EPI_DATA_PATTERN[ inx % 2 ] )										// If the EPI data doesn't match the expected value
		    epiData = epiData;																// Breakpoint to check for errors
	}
}

/******************************************************************************/
/*                             UPDATE OUTPUT STATE                            */
/******************************************************************************/
/*                                                                            */
/* Description : This function updates the specified pin state.               */
/*                                                                            */
/*============================================================================*/
/* Notes       :                                                              */
/*                                                                            */
/******************************************************************************/
static void updateOutputState( uint32_t port, uint8_t pin, enum outputStateChange_e action )
{
	uint8_t state;
	
	state = MAP_GPIOPinRead( port, pin );	// Read current pin state
	switch( action )						// Branch based on the requested action
	{
		case DISABLE_OUTPUT :				// If request to disable the specified output
			state &= ~pin;					// Clear requested pin state
			break;
		case ENABLE_OUTPUT  :				// If request to enable the specified output
			state |= pin;					// Set requested pin state
			break;
		case TOGGLE_OUTPUT  :				// If request to toggle the specified output
			state ^= pin;					// Toggle the specified pin state
			break;
	}
	MAP_GPIOPinWrite( port, pin, state );	// Set specified port output to default state
}