Hello,
I'm developing a standalone bootloader application for the TMS570LS3137HDK. The memory map is as follows:
Flash0 - bootloader application only
Flash1 - application
Flash7 - configuration data constants that are retrieved by the application, not the bootloader application
I have successfully created the bootloader application that accepts binaries over ethernet TFTP, and then jumps to them. I have tested this with a simple application from QJ Wang, TMS570LSx_rtiBlinky_BL_APP20020. No issues there, and everything works fine. However, that example only utilizes flash bank 1 and not flash bank 7. I am now trying to load an application with the above layout. Other notes:
1. I am using ECC generation through the Flash API, with the command Fapi_AutoEccGeneration in Fapi_issueProgrammingCommand when I write my application to flash with the bootloader
2. All self tests are turned off in the bootloader application, but they are turned on in my application as I've seen that recommended by TI.
3. My application starts at 0x00180020 in flash bank 1
4. I am running the Flash library from flash bank 0, not RAM, because I'm only performing operations on banks other than bank 0 (where my bootloader resides)
The following is my linker script for the bootloader in Flash bank 0:
/*----------------------------------------------------------------------------*/
/* sys_link.cmd */
/* */
/*
* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN (0) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/
/* Linker Settings */
--retain="*(.intvecs)"
/* USER CODE BEGIN (1) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/
/* Memory Map */
MEMORY
{
/* USER CODE BEGIN (2) */
VECTORS (X) : origin=0x00000000 length=0x00000020 vfill = 0xffffffff
FLASH0 (RX) : origin=0x00000020 length=0x180000-0x20 vfill = 0xffffffff
FLASH1 (RX) : origin=0x00180000 length=0x00180000 vfill = 0xffffffff
SRAM (RWX) : origin=0x08002000 length=0x0002D000
STACK (RW) : origin=0x08000000 length=0x00002000
/* USER CODE END */
/* USER CODE BEGIN (3) */
#if 1
ECC_VEC (R) : origin=(0xf0400000 + (start(VECTORS) >> 3))
length=(size(VECTORS) >> 3)
ECC={algorithm=algoL2R5F021, input_range=VECTORS}
ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0) >> 3))
length=(size(FLASH0) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH0 }
ECC_FLA1 (R) : origin=(0xf0400000 + (start(FLASH1) >> 3))
length=(size(FLASH1) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH1 }
#endif
/* USER CODE END */
}
/* USER CODE BEGIN (4) */
ECC
{
algoL2R5F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */
hamming_mask = R4 /* Use R4/R5 build in Mask */
parity_mask = 0x0c /* Set which ECC bits are Even and Odd parity */
mirroring = F021 /* RM57Lx and TMS570LCx are build in F021 */
}
/* USER CODE END */
/*----------------------------------------------------------------------------*/
/* Section Configuration */
SECTIONS
{
/* USER CODE BEGIN (5) */
/* USER CODE END */
.intvecs : {} > VECTORS
.text align(32) : {} > FLASH0
.const align(32) : {} > FLASH0
.cinit align(32) : {} > FLASH0
.pinit align(32) : {} > FLASH0
.bss : {} > SRAM
.data : {} > SRAM
.sysmem : {} > SRAM
/* USER CODE BEGIN (6) */
flashAPI:
{
..\Debug\Fapi_UserDefinedFunctions.obj (.text)
..\Debug\bl_flash.obj (.text)
--library= "..\F021_Flash_API_02.01.01\F021_API_CortexR4_BE.lib" (.text)
} palign=8 load = FLASH0
/* USER CODE END */
}
/* USER CODE BEGIN (7) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/
/* Misc */
/* USER CODE BEGIN (8) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/
The following is my linker script for the Flash bank 7 configuration data:
/*
* sys_link.cmd
*
*/
/*----------------------------------------------------------------------------*/
/* Linker Settings */
--retain="*(.intvecs)"
/*----------------------------------------------------------------------------*/
/* Memory Map */
MEMORY
{
VECTORS (X) : origin=0x00000000 length=0x00000020
FLASH0 (RX) : origin=0x00000020 length=0x0017FFE0
FLASH1 (RX) : origin=0x00180000 length=0x00180000
STACKS (RW) : origin=0x08000000 length=0x00001500
RAM (RW) : origin=0x08001500 length=0x0003EB00
FLASH7_0 (RW) : origin=0xF0200000 length=0x00004000 vfill = 0xFFFFFFFF
FLASH7_1 (RW) : origin=0xF0204000 length=0x00004000 vfill = 0xFFFFFFFF
FLASH7_2 (RW) : origin=0xF0208000 length=0x00004000 vfill = 0xFFFFFFFF
FLASH7_3 (RW) : origin=0xF020C000 length=0x00004000 vfill = 0xFFFFFFFF
ECC_FLA7_0 (R) : origin=(0xf0100000 + (start(FLASH7_0) >> 3))
length=(size(FLASH7_0) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH7_0 }
ECC_FLA7_1 (R) : origin=(0xf0100000 + (start(FLASH7_1) >> 3))
length=(size(FLASH7_1) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH7_1 }
ECC_FLA7_2 (R) : origin=(0xf0100000 + (start(FLASH7_2) >> 3))
length=(size(FLASH7_2) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH7_2 }
ECC_FLA7_3 (R) : origin=(0xf0100000 + (start(FLASH7_3) >> 3))
length=(size(FLASH7_3) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH7_3 }
}
/*----------------------------------------------------------------------------*/
/* Section Configuration */
ECC
{
algoL2R5F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */
hamming_mask = R4 /* Use R4/R5 build in Mask */
parity_mask = 0x0c /* Set which ECC bits are Even and Odd parity */
mirroring = F021 /* RM57Lx and TMS570LSx are build in F021 */
}
SECTIONS
{
// executable code
.intvecs palign(32) : {} > VECTORS, type = NOLOAD
.text palign(32) : {} > FLASH0, type = NOLOAD
.const palign(32) : {} > FLASH0, type = NOLOAD
.cinit palign(32) : {} > FLASH0, type = NOLOAD
// not linking RAM CRCs
.bss palign(32) : {} > RAM
.data palign(32) : {} > RAM
.sysmem palign(32) : {} > RAM
.configtables palign(32) : {} > FLASH7_0, crc_table(_config_crc, algorithm=CRC32_PRIME)
.TI.crctab palign(32) : {} > FLASH7_3
}
The following is the linker script for the Flash bank 1 application code:
/*----------------------------------------------------------------------------*/
/* sys_link.cmd */
/* */
/*
* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN (0) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/
/* Linker Settings */
--retain="*(.intvecs)"
/* USER CODE BEGIN (1) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/
/* Memory Map */
MEMORY
{
VECTORS (X) : origin=0x00180020 length=0x00000020
FLASH1 (RX) : origin=0x00180040 length=0x00180000-0x40
STACKS (RW) : origin=0x08000000 length=0x00003300
RAM (RW) : origin=0x08003300 length=0x0003cd00
/* USER CODE BEGIN (2) */
FLASH7_0 (R) : origin=0xF0200000 length=0x00004000
FLASH7_3 (R) : origin=0xF020C000 length=0x00004000
/* USER CODE END */
}
/* USER CODE BEGIN (3) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/
/* Section Configuration */
/* USER CODE BEGIN (4) */
ECC
{
algoL2R5F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */
hamming_mask = R4 /* Use R4/R5 build in Mask */
parity_mask = 0x0c /* Set which ECC bits are Even and Odd parity */
mirroring = F021 /* RM57Lx and TMS570LCx are build in F021 */
}
/* USER CODE END */
/* USER CODE BEGIN (5) */
SECTIONS
{
.intvecs palign(32) : {} > VECTORS,crc_table(_intvects_crc, algorithm=CRC32_PRIME)
.text palign(32) : {} > FLASH1, crc_table(_text_crc, algorithm=CRC32_PRIME)
.const palign(32) : {} > FLASH1, crc_table(_const_crc, algorithm=CRC32_PRIME)
.cinit palign(32) : {} > FLASH1, crc_table(_cinit_crc, algorithm=CRC32_PRIME)
.pinit palign(32) : {} > FLASH1
.bss : {} > RAM
.data : {} > RAM
.sysmem : {} > RAM
//FEE_TEXT_SECTION palign(32) : {} > FLASH1
//FEE_CONST_SECTION palign(32) : {} > FLASH1
//FEE_DATA_SECTION palign(32) : {} > RAM
// CRC result tables
.TI.crctab : > FLASH1
// The config and config CRC sections are built and loaded from the configurator
// project but referenced from here.
// See http://processors.wiki.ti.com/index.php/Linker_Command_File_Primer
.configtables palign(32) : {} > FLASH7_0, type = NOLOAD, LOAD_START(CONFIG_TABLES)
.configcrc palign(32) : {} > FLASH7_3, type = NOLOAD, LOAD_START(ConfigCrc)
}
/* USER CODE END */
/*----------------------------------------------------------------------------*/
/* Misc */
/* USER CODE BEGIN (6) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/
Right now I'm trying to get this working in a debug environment where I load the bank 7 config data first, and then the bootloader and application. My bootloader checks for the "magic word" to see if it should jump to the application, so if I load the application via debug session and run it from the there, everything works. The issue presents itself when I jump to the application after transferring the binary via TFTP and the bootloader.
Registers after branching to flashErrorReal:
CP15_DATA_FAULT_STATUS: 0x00000409 (from _coreGetDataFault_ comments in sys_startup.c -
* - 0b11001: Precise ECC Error -> address is valid
)
CP15_DATA_FAULT_ADDRESS: 0x00196EB8
FUncErrAddr (uncorrectable error address in the flash wrapper register): 0x00196EB8
Looking at that address in memory viewer:
So something tells me this is an ECC issue that can be solved through the linker script, but my hunch is that I'm missing something pertaining to the configuration data in flash bank 7.
