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Communicate with ARM7TDMI Core via DCC over JTAG (TMS470PSF)

GOAL: I'm trying to get past a few hurdles so I can communicate with the ARM7TDMI Core using the DCC (Debug Communications Channel) registers via JTAG.

PROCESS:

1. Currently I've determined that you must select the TAP associated with the core and bypass the ICEPick. I've successfully performed this based on the information provided here http://processors.wiki.ti.com/index.php/ICEPICK 

2. Once the Correct TAP is selected I can now communicate with the ARM Core, however, there are several scan chains (Sub scan chains, if you will) for the ARM Core as well. I believe that the scan chain I need to use in order to communicate with the DCC is the Scan Chain 2, "EmbeddedICE-RT Logic Programming". 

3. I've performed what I believe, based on the ARM7TDMI Reference Manual, to be the process for selecting and activating Scan Chain 2

- Select Scan Chain 2

  - Place Scan Chain 2 into "INTEST" mode to allow communication to and from the core.

 

PROBLEMS:

1. When I perform the final step "INTEST" I get the ERROR LED on my demo board... unfortunately I cannot tell what the specific error is.

2. The Section in the ARMTDMI Manual for the DCC describes 3 32-bit registers, yet the Registers available for the EmbeddedICE-RT scan chain show 2 registers one of 6-bits and one of 32-bits.

 

Anybody with insight on how to access the core for Memory reads/writes in real-time would be much appreciated.

  • Hi Dustin,

    I had an opportunity to try something similar about a decade ago. I am a bit rusty, but  I think I see one of your problems.  TMS470P devices use the ARM7TDMI rev 3 CPU.  Most of the ARM documentation available is referencing the ARM7TDMI rev 4 CPU.  There were some differences between the revisions in regards to the Embedded ICE-RT logic.

    If I look at a local copy of the ARM7TDMI rev 3 TRM from ARM (DDI0029G), it notes 2 32b registers and one 6b register.  If I look at the most recent ARM TRM for ARM7TDMI (DDI0210B), it references rev 4 and notes 3 32b registers.  Try reviewing the rev3 TRM from ARM and see if you get a bit further.

     

    Regards,

    Karl

  • Hi Dustin,

    Did this take care of your question?  Can I close this thread, please?

     

  • Although the suggestion was appreciated, the Documentation for the DCC was still not helpful regardless of the revision. The DCC was abandoned for what I was trying to accomplish since it was determined not to be real-time.

    This thread can be closed from my perspective.

    Thanks