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SAFETI_DIAG_LIB: Guidance on integration SafeTI library with a bootloader

Part Number: SAFETI_DIAG_LIB
Other Parts Discussed in Thread: HALCOGEN, TMS570LS1224

Dear,

we are following a TI sample for our CAN bootloader. We now want to integrate the application with the SafeTI library.

Integrating the SafeTI library with the application target that does not use a bootloader is straightforward by following the provided documentation.

Since having a BL is quite a common use case, I was wondering if there is documentation or other guidance available for integrating with the SafeTI library.

If there is something available, could you point me to it?

If there is nothing available, could you walk me through the required steps?

Thank you.

Sincerely.

Julian

  • Hi Julian,

    The SafeTI Diagnostic Library (SDL) includes examples. Please use those examples as references. 

    The SDL user guide and other docs are located in C:\ti\Hercules\SafeTI Diagnostic Library\2.4.0\docs

    The examples are CCS projects and are located in C:\ti\Hercules\SafeTI Diagnostic Library\2.4.0\build

  • Dear,

    could you be more specific? As stated, I am able to build and use the safety library for my target without a bootloader by following the docs that you have referenced.

    My question was with regards to integrating with a bootloader. I could not find anything on that matter.

    Thank you.

    Best regards

    Julian

  • Hi Julian,

    You can use the example as a reference. There is nothing special for integrating SDL to your application. 

    Did you get any error when calling SDL APIs from your application?

  • Hi,

    there was nothing special to it without the bootloader. I have used the more simple HALCoGen SafetyLib sample startcode.

    Unfortunately I get stuck early when I try to integrate with the bootloader (the application remains the user of the SL). As soon as the jump to the application happens, I am stuck. Since I know the debugger interferes with the SL, I have tried to use the LEDs to find the position where I get stuck:

    In _c_int00(), there are two calls, _coreInitRegisters_ and _coreInitStackPointer_. Immediately afterwards, I set the pins to my LEDs to output (directly via gioPORTB->DIR) and enable them (directly via gioPORTB->DSET). However, I do not seem to reach this point.

    Any pointers are greatly appreciated.

    Thanks

    Julian

  • Hi Julian,

    I am confused. Are you going to integrate the SDL to your bootloader or to your application? The bootloader is a compact solution for reprogramming the application image quickly. You don't have to integrate SDL to bootloader. You can use the HALCoGen generated code to enable/disable ECC, and BIST test.

  • No, integrating the SDL into the application.

    I learned that the colleague who did our bootloader also apllied some application note to share the vectors between app and bl. Since we do not use that, I have asked him to undo this to make the bootloader more similar to the original TI sample in that regard.

    I assume that this was the issue that got me stuck. Will know tomorrow or the day after and then come back here.

    But you can confirm that there is nothing special to consider when the app location is not at 0x00000000? I thought maybe some additional setup is required for exception handling? Or is the branching in the TI bl sample sufficient and thus the bootloader transparent for the SDL?

    Thank you for the patience, I know my request quality is still a little rough right now.

  • Ok, changes to the bootloader vector table are in and that works fine now. I can get it to work now, but only if I skip PBIST_RAMGROUP_06_ESRAM1. If I leave in

    • (PBIST_RAMGROUP_06_ESRAM1 | PBIST_RAMGROUP_21_ESRAM5 | PBIST_RAMGROUP_22_ESRAM6)

    it will error out (drive nERROR low, branching at ramErrorReal indefinetly).

    So, good progress, but I would appreciate a tip for this RAM error.

    Thanks.


    Addendum: I did check that MARCH13 single port is available to all three RAM groups here (06, 21, 22) in the TRM, tables 2-5 and 2-6. The device we use is the TMS570LS1224.

  • Hi Julian,

    After PBIST test, the contents of the selected RAM group will be completely lost. Are there any important data in RAM before the PBIST test? If yes, you may need to backup those contents.

  • Hi,

    no, the application start code is just from the HALCoGen SL example. It is unchanged and as far as I can see it does not set up RAM data that would be destroyed.

  • Ok, I think I found it. I have compared the start code of the SL sample project and the start code of the HALCoGen SL example. The latter is missing this call before the RAM test:

    • _coreDisableRamEcc_();

    As soon as I add that, I can reenable testing of ESRAM1.

    I assume that I should take the SL demo app as a starting point anyway?

  • Nice! Yes, you can use the demo as a starting point!