This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TM4C1294NCPDT: What happens to a TM4C microcontroller when you push the "Read Target Device" button in uniflash?

Part Number: TM4C1294NCPDT
Other Parts Discussed in Thread: UNIFLASH

Hi,

I'm using a TM4C1294NCPDT with an XDS110 debugger. I was curious about the presence of code in Flash memory. So I attempted to read memory using Uniflash. When I pressed the "Read Target Device" button, my application became corrupted for a short period of time. Interruptions did not work in that short amount of time. As a result, I need to understand the actions from Uniflash to the TM4C microcontroller.

Please assist me in understanding the concept and operation of the flash read in Uniflash using the xds110 debugger and clearing these doubts.

1. What impact does this have on my application code?
2. What happens when Uniflash and Microcontroller interact?
3. Is the flash freezing?
4. Why aren't the interrupts executed in the particular time?

  • I'm using a TM4C1294NCPDT with an XDS110 debugger. I was curious about the presence of code in Flash memory. So I attempted to read memory using Uniflash. When I pressed the "Read Target Device" button, my application became corrupted for a short period of time. Interruptions did not work in that short amount of time.

    What do you mean by corruption? Or do you mean the application is unable to complete its task at an expected time while the debugger is reading the target memory?

    1. What impact does this have on my application code?
    2. What happens when Uniflash and Microcontroller interact?
    3. Is the flash freezing?
    4. Why aren't the interrupts executed in the particular time?

    I'm not an expert in the Uniflash architecture. From a high level, you can think of Uniflash like a debugger. Uniflash may have halted the processor so it can scan instructions (e.g. LDM instruction) to the CPU's debug logic and has the CPU read the memory content.  If your application is sensitive to the CPU being halted like interrupts or competing with other master (e.g. uDMA) accessing the same resource then you may see some effect.