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Hi Hang,
Using a timer is suggested for timeout and delay. If a memory region is configured as a sharable attribute, then the memory system needs to ensure the coherency of data between the different processor. When data access is indicated as Sharable, the cache controller needs to ensure that the value is coherent with the other cache units. This is necessary because the value could have been cached and modified by another processor. The same operation to sharable memory will take longer time.
是否是代码运行时间变慢,或者时钟频率等受到影响未知
The system clock is not impacted by the MPU settings. The code execution performance can be affected.
6.后询问其他同事得知,此选项如果选为Cached,会无法访问OTP区域;
For peripheral registers, and OTP, the strongly-ordered attribute is recommended.