TMS570LS0714: To generate PWM signal on N2HET or EPWM module

HI Salah,

Salah Gafoor said:

I referred some articles to generate a variable duty cycle PWM using NHET module but found difficult as HET compiler should be used for that (please correct me if I'm wrong).

For simple PWM generation from NHET doesn't need HET compiler, you can easily generate it from HALCoGen itself.

If you go to the "Help Topics" section in HALCoGen

Here you can find step by step procedure and code for HET PWM generation directly from HALCoGen without using HET compiler.

Salah Gafoor said:

The other work around I believe is EPWM function on the pin. How can I achieve that?

Yes, you can also use EPWM.

In "Help Topics" there is an another example called "etpwm_ecap"

This example is based on both ETPWM and ECAP, so here you can ignore the ECAP related configurations and code and you can just use the ETPWM related configuration and code to generate the ETPWM.

You can also refer below two examples of ETPWM i created:

ETPWM_Example_RM46.zip

ETPWM_TEST_LC43.zip

--

Thanks & regards,
Jagadish.

Thanks a lot for your response.

I got some insight but a little confused while referring the help topic link.

My requirement is that I've to apply the PWM signal to an LED connected at EPWM4B (pin 25) of TMS570LS0914.

For testing purpose, we can generate 1sec period with a 50% duty cycle.

Following is my code I've generated using Halcogen (with some modifications I've made). I'm getting an observation is that TBCTR is incrementing till TBPRD and it's getting reset. It's not considering values in CMPB register. (values loaded in TBPRD and CMPB might be wrong as I was trying it out values for testing)

void etpwmInit(void)
{
    /** - Sets high speed time-base clock prescale bits */
    etpwmREG4->TBCTL = (uint16)0U << 7U;

    /** - Sets time-base clock prescale bits */
    etpwmREG4->TBCTL |= (uint16)((uint16)0U << 10U);

    /** - Sets time period or frequency for ETPWM block both PWMA and PWMB*/
    etpwmREG4->TBPRD = 5000;

    /** - Setup the duty cycle for PWMA */
    etpwmREG4->CMPA = 2000U;

    /** - Setup the duty cycle for PWMB */
    etpwmREG4->CMPB = 1000U;

    /** - Force EPWMxA output high when counter reaches zero and low when counter reaches Compare A value */
    etpwmREG4->AQCTLA = ((uint16)((uint16)ActionQual_Set   << 0U)
                       | (uint16)((uint16)ActionQual_Clear << 4U));

    /** - Force EPWMxB output high when counter reaches zero and low when counter reaches Compare B value */
    etpwmREG4->AQCTLB = ((uint16)((uint16)ActionQual_Set   << 0U)
                       | (uint16)((uint16)ActionQual_Clear << 8U));

    /** - Mode setting for Dead Band Module
    *     -Select the input mode for Dead Band Module
    *     -Select the output mode for Dead Band Module
    *     -Select Polarity of the output PWMs
    */
    etpwmREG4->DBCTL = (uint16)((uint16)0U << 5U) /* Source for Falling edge delay(0-PWMA, 1-PWMB) */
                     | (uint16)((uint16)0U << 4U) /* Source for Rising edge delay(0-PWMA, 1-PWMB)  */
                     | (uint16)((uint16)0U << 3U)  /* Enable/Disable EPWMxB invert       */
                     | (uint16)((uint16)0U << 2U)  /* Enable/Disable EPWMxA invert       */
                     | (uint16)((uint16)0U << 1U) /* Enable/Disable Rising Edge Delay   */
                     | (uint16)((uint16)0U << 0U);    /* Enable/Disable Falling Edge Delay  */

    /** - Set the rising edge delay  */
    etpwmREG4->DBRED = 1U;

    /** - Set the falling edge delay  */
    etpwmREG4->DBFED =  1U;

    /** - Enable the chopper module for ETPWMx
    *     -Sets the One shot pulse width in a chopper modulated wave
    *     -Sets the dutycycle for the subsequent pulse train
    *     -Sets the period for the subsequent pulse train
    */
    etpwmREG4->PCCTL = (uint16)((uint16)0U << 0U)  /* Enable/Disable chopper module */
                     | (uint16)((uint16)0U << 1U)    /* One-shot Pulse Width */
                     | (uint16)((uint16)3U << 8U)  /* Chopping Clock Duty Cycle */
                     | (uint16)((uint16)0U << 5U);   /* Chopping Clock Frequency */

        /** - Set trip source enable */
    etpwmREG4->TZSEL = 0x0000U    /** - Enable/Disable TZ1 as a one-shot trip source */
                     | 0x0000U    /** - Enable/Disable TZ2 as a one-shot trip source */
                     | 0x0000U    /** - Enable/Disable TZ3 as a one-shot trip source */
                     | 0x0000U    /** - Enable/Disable TZ4 as a one-shot trip source */
                     | 0x0000U    /** - Enable/Disable TZ5 as a one-shot trip source */
                     | 0x0000U    /** - Enable/Disable TZ6 as a one-shot trip source */
                     | 0x0000U    /** - Enable/Disable TZ1 as a CBC trip source      */
                     | 0x0000U    /** - Enable/Disable TZ2 as a CBC trip source      */
                     | 0x0000U    /** - Enable/Disable TZ3 as a CBC trip source      */
                     | 0x0000U    /** - Enable/Disable TZ4 as a CBC trip source      */
                     | 0x0000U    /** - Enable/Disable TZ5 as a CBC trip source        */
                     | 0x0000U;   /** - Enable/Disable TZ6 as a CBC trip source      */

    /** - Set interrupt enable */
    etpwmREG4->TZEINT = 0x0000U    /** - Enable/Disable Digital Comparator Output A Event 1 */
                      | 0x0000U    /** - Enable/Disable Digital Comparator Output A Event 2 */
                      | 0x0000U    /** - Enable/Disable Digital Comparator Output A Event 1 */
                      | 0x0000U    /** - Enable/Disable Digital Comparator Output A Event 2  */
                      | 0x0000U    /** - Enable/Disable one-shot interrupt generation        */
                      | 0x0000U;   /** - Enable/Disable cycle-by-cycle interrupt generation  */

    /** - Sets up the event for interrupt */
    etpwmREG4->ETSEL = (uint16)NO_EVENT;

    if ((etpwmREG4->ETSEL & 0x0007U) != 0U)
    {
        etpwmREG4->ETSEL |= 0x0008U;
    }
    /** - Setup the frequency of the interrupt generation */
    etpwmREG4->ETPS = 1U;

    /** - Sets up the ADC SOC interrupt */
    etpwmREG4->ETSEL |= (uint16)(0x0000U)
                      | (uint16)(0x0000U)
                      | (uint16)((uint16)DCAEVT1 << 8U)
                      | (uint16)((uint16)DCBEVT1 << 12U);

    /** - Sets up the ADC SOC period */
    etpwmREG4->ETPS |= ((uint16)((uint16)1U << 8U)
                      | (uint16)((uint16)1U << 12U));
	etpwmStartTBCLK();
}					  
void etpwmStartTBCLK(void)
{
    /* Enable Pin Muxing */
    kickerReg->KICKER0 = 0x83E70B13U;
    kickerReg->KICKER1 = 0x95A4F1E0U;
	
	pinMuxReg->PINMMR[37] = (pinMuxReg->PINMMR[37] & PINMUX_ETPWM_TBCLK_SYNC_MASK) | (PINMUX_ETPWM_TBCLK_SYNC_ON);
	pinMuxReg->PINMMR[33] |= 0x02;
    /* Disable Pin Muxing */
    kickerReg->KICKER0 = 0x00000000U;
    kickerReg->KICKER1 = 0x00000000U;
}


void main()
{

	etpwmInit();
	
}

What am I doing wrong here? Could you please help?

Can you please zip your entire project and share it?

If you don't know how to attach complete project then refer below thread:

(+) TMS570LC4357: TMS570LC43X - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

2744.pwm.zip

Hi Jagadish,

I've attached my halcogen project.

I have modified some of its parts (etpwm.c) when I coped that into my actual project (which cannot be disclosed).

For example, to start the TBCLK, etpwmStartTBCLK() was not called anywhere. So I called that inside etpwmInit().

Basically, I require minimal registers to be set/read to achieve my requirement. Halcogen is confusing me a lot.

Greatly appreciated, if you can point out issues in my code (posted above) specifically.

Hi Salah,

Two things i am suspecting!

1. I don't see while(1) in your code, you should give while(1) because you should not terminate from main function.

2. Why you are giving 100% falling edge delay for ETPWM4_B from ETPWM4_A.

Instead of just make ETPWM4B independent from ETPWM4A as below:

Make this change and regenerate the code and test it.

--
Thanks & regards,
Jagadish.

Sorry for that. 

I missed the while loop while copying.

I regenerated after making ETPWM4B independent from ETPWM4A. 

But observation is still the same.

I hope I should call etpwmStartTBCLK() after the etpwminit() which was not done in Halcogen code. right?

Salah Gafoor said:

I hope I should call etpwmStartTBCLK() after the etpwminit() which was not done in Halcogen code. right?

Yes you are right. You should call it.

What could the issue then?

If TBCTR value become equal to CMPB, then we are supposed to get an interrupt (compare interrupt) right?

How to implement that? Is there any callback function of something to handle that?

Hi Salah,

How are you verifying the generated PWM output?

We just configured to generate only 1uS output with 50% duty cycle only. That means the output is 1Mhz waveform. If you are verifying this with LED then you can't see the blinking, can you please verify with CRO or some other logic analyzer?

--

Thanks & regards,
Jagadish.

Thanks for pointing out that.

Currently checking with CRO is difficult due to accessibility issues. But for testing purpose, I would like to produce a 1sec period waveform on that pin. The HCLK is 80MHz. Could you please suggest values (CMPB, TBPRD) given to produce a 50% duty cycle waveform (1 sec period)?

Just try below configuration to generate the 1Sec PWM: