AM2634-Q1: difference between MEM_INIT register and memset all 0

Will Gao

Part Number: AM2634-Q1

Hi BU,

What is the difference between clearing SRAM to 0 by using L2RAM_MEM_INIT register and by using memset software method?

Customer found 1 pcs board would get into prefetch abort during executing QSPI_init function. And I found that the program is allocated to 0x70100000~0x70200000, I know that RBL will only initialize the SRAM space of the 0x70000000~0x70100000 but not 0x70100000~0x70200000. And in customer's SBL, they don't initialize the SRAM space of 0x70100000~0x70200000, instead they use memset. Do you think this could lead to the issue of prefetch abort? If it is, please tell the difference between clearing SRAM to 0 by using L2RAM_MEM_INIT register and by using memset software method.

Regards,

Will

over 1 year ago

0 Nilabh Anand over 1 year ago

TI__Mastermind 45084 points

Hi Will,

Thread has been assigned to the expert, please expect a response by tomorrow.

0 Will Gao over 1 year ago in reply to Nilabh Anand

TI__Intellectual 2335 points

Hi Nilabh,

couple days passed, any comments on this issue?

+1 Anand Mahadevan SS over 1 year ago in reply to Will Gao

TI__Expert 8165 points

Hi Will,

I am not sure why someone would assume that initialising a memory bank is equivalent to calling a memset (which is a DATA WRITE to the memory location). Without initialising a memory bank you can't read from or write to that location. The abort is expected. So please initialise the memory bank.

Regards,
Anand Mahadevan SS

0 Will Gao over 1 year ago in reply to Anand Mahadevan SS

TI__Intellectual 2335 points

Hi Anand,

Got it. Thanks.

0 Will Gao over 1 year ago in reply to Anand Mahadevan SS

TI__Intellectual 2335 points

Hi Anand,

Another 3 questions from customer:

1. if program doesn't call MEM_INIT, why some location in SRAM can't be written and its value is random? Please give explanation from IC HW design.

2. why ROM bootloader only does MEM_INIT for first 1MB range of SRAM but not all of the 2MB space?

3. need TI to declare this point (i.e. SBL should do MEM_INIT for rest range of SRAM) into datasheet or TRM.

Please help answer the above 3 questions, Thanks.

Regard,

Will

0 Aakash Kedia over 1 year ago in reply to Will Gao

TI__Mastermind 26145 points

Hi Will,

Will Gao said:
1. if program doesn't call MEM_INIT, why some location in SRAM can't be written and its value is random? Please give explanation from IC HW design.

As the power is provided to the SoC, the memory array in the SoC can have any residual data from previous cycle or leakage power. Hence, it is highly recommended that user should initialize the memory and also perform self test on this memory.

Will Gao said:
2. why ROM bootloader only does MEM_INIT for first 1MB range of SRAM but not all of the 2MB space?

The maximum size supported of an SBL image is 960KB which consists of 2 Banks of SRAM i.e. of 1MB. Hence, ROM only initializes 1MB of SRAM via MemInit and self-test (BIST).

Will Gao said:
3. need TI to declare this point (i.e. SBL should do MEM_INIT for rest range of SRAM) into datasheet or TRM.

RBL configurations are only to focus smooth functioning and bring-up of SBL (and also HSM RunTime). After the SBL is up, the SBL needs to enable different peripherals and memories according to the application requirements. The example SBL in SDK already demonstrates the same.

https://dev.ti.com/tirex/explore/node?node=A__AVRt7VOfMlJSz4InbZKf4A__AM26X-ACADEMY__t0CaxbG__LATEST

I hope this helps.

Best Regards,
Aakash

0 Will Gao over 1 year ago in reply to Aakash Kedia

TI__Intellectual 2335 points

Hi Aakash,

Thanks for your answer.

For question 1, I want to further check with you what kinds of facts will impact this randomness, because when customer placed their codes in 0x70100000~0x70180000, the issue is very very hard to happen; However if placing in 0x70180000~0x7020000 range, the possibility will get higher. Any physical mechanism behind this phenomenon?

0 Will Gao over 1 year ago in reply to Aakash Kedia

TI__Intellectual 2335 points

BTW, please also help explain why if not do MEM_INIT, some location can't be written. Because in customer program, they use memset to clear all of the 0x70100000~0x70180000 SRAM to 0.

0 Aakash Kedia over 1 year ago in reply to Will Gao

TI__Mastermind 26145 points

Let me get more information from the design to comment on this.

0 Aakash Kedia over 1 year ago in reply to Aakash Kedia

TI__Mastermind 26145 points

Hi Will,

Response from the design -

The memories are not initialized so their ECC is also not initialized.
ECC for L2 Memory is computed for 64Bit width
When ARM CPU writes a 32Bit value, the Memory controller reads the 64Bit data from L2, and then merges the 32Bit data and recomputes the ECC and writes back.
1. However when reading the 64Bit since it is a not initialized memory, the ECC is garbage and a fault is triggered.
2. This interferes with the correct value being written.

I hope this resolves the problem.

Best Regards,
Aakash

0 Will Gao over 1 year ago in reply to Aakash Kedia

TI__Intellectual 2335 points

Hi Aakash,

Thanks for you reply, let me discuss with customer and see if they have further questions.

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AM2634-Q1: difference between MEM_INIT register and memset all 0