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AM2634-Q1: booting fail at 85C Chamber test

Part Number: AM2634-Q1
Other Parts Discussed in Thread: AM2634

Dear Champs,

My customer faced a booting fail issue in 85C Chamber test, but could not find any issues in power rails as below.

Could you please let me know what should be checked further?

Do you think below clock wave would be OK? 

<1.2V>

<3.3V>

< Ripples >

< Clock >

Thanks and Best Regards,

SI.

  • Hi SI,

    Thanks for sharing all the details.  I don't see any critical issues with the power supply voltages.  They are well within the allowable limits on the Recommended Operating Conditions table of the AM263x datasheet.

    One thing that I do notice is the load capacitors on the crystal are really small.  The AM263x Datasheet, in section 7.11.4 Clock Specifications, mentions the effective load capacitance for the XI/XO pins on the crystal should be between 12 and 24pF.  Note that this includes the actual load capacitors (C_L1/2 and the PCB trace capacitance).  The PCB trace capacitance on XI/XO should be less than 2-3 pF depending on the layout (better layouts with shorter XI/XO traces have less trace capacitance).  So this puts the total load capacitance lower than expected by the AM2634 device, which can cause crystal stabilization issues.

    What crystal are you using?  Can you switch to one that requires load capacitors in the 12-15pF range?  Alternative, you can try adjusting the capacitors slightly larger than specified by the crystal datasheet (try increasing them to 12pF) and see if the crystal and PLL are then able to stabilize.  Note that if the crystal is able to stabilize with larger than specified, it will very slightly decrease the frequency of the crystal.  However, even if the slower frequency with this crystal is not acceptable, running this test will confirm if the load capacitors are too small for the AM2634.

    Thanks,
    Mike

  • Hi Mike,

    It seems this booting fail issue was caused by PLL setting issue, and I would like to check with you on capacitors for clock.

    When they changed capacitors to 15pF, they measured clocks as below and it seems old CLK with 8.2pF is better than new CLK with 15pF.

    Could you please check below screen shot and let me know your opinion if they should use 15pF or other suggested value.

    In above,

    - CH3(RED), CH4(Green) -> clock with 15pF

    - REF1(GRAY), REF2(Blue) -> clock with 8.2pF

    It seems the booting fail issue was resolve by modifying PLL setting code as below although we are still verifying it. There was no improvement in booting fail issue after changing to 15pF. I would like to check which value should be suggested to my customer for capacitor.

    https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1303644/am2634-q1-mcal-stable-pll-value-in-mcal/ 

    Thanks and Best Regards,

    SI.

  • Hi SI,

    The concern with the load capacitors was that you are operating outside of the value range specified in the datasheet (8pF vs 12pF to 24pF).  As with all things that are marginally outside of datasheet spec: it may work, particularly in limited quantities, but the concern is that across a large number of devices, we cannot guarantee that it will function properly due to process variations/etc.

    My recommendation on the crystal load caps is to discuss with the crystal vendor to determine the best crystal and load cap configuration that works within the load cap ranges of the AM263 datasheet.  Also, some crystal vendors will help analyze a specific board and tune the exact recommended crystal and load cap configuration to match the board to give the best possible crystal circuit.

    Regarding stabilizing the PLL, if you have another root cause identified, it makes sense to pursue that route and determine if the fix is viable.  I highlighted the load capacitors as a potential issue, with the recommendation that the crystal circuit be changed to operate within the AM263x datasheet specs.  This does not necessarily mean the load caps are the ultimate root cause of your problem.

    Thanks,
    Mike

  • Hi Mike,

    Thanks for the clarification.

    Customer questioned if they should consider internal load CAP in crystal or now.

    e.g. In their understanding, the internal load capacitance is 8pF and Shunt Capacitance is 2pF. By considering this, they used 8.2pF for external load capacitor. Is it OK with 8pF of internal load cap? or should they consider only external load cap by ignoring the value of internal load cap? 

    Thanks and Best Regards,

    SI.

  • Hi Mike,

    customer should fix HW soon.

    Could you please check and let me know if they should add internal load cap value of crystal or not?

    e.g. internal load cap + external load cap =  12~ 15pF ?

    Thanks and Best Regards,

    SI.

  • Hi SI,

    Yes, you should consider all capacitance when calculating effective load capacitance of the crystal.  This is internal, external and parasitic (pcb trace) capacitance.

    Thanks,
    Mike