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TMS570LC4357: the meaning of MibSPI's register TGxCTRL.PRST(bit29)

Yale Li 李耀先
Expert 4660 points
Part Number: TMS570LC4357

https://www.ti.com.cn/cn/lit/ug/spnu563a/spnu563a.pdf P1583

When it is 0, transmission takes priority. Because this bit is related to the level-trigger signal. If the transfer continues, the level signal will always be triggered.

Pls clarify.

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Thanks & Regards

  • 0
    TI__Guru*** 135355 points

    Hello Yale,

    All our experts for these devices are on Holiday leave until the 27th, so apologies that we will not be able to provide an answer until the back half of next week.

    Best Regards,

    Ralph Jacobi

  • 0 in reply to Ralph Jacobi
    TI__Guru 70621 points

    Hi Yale,

    Apologies for the delay in the response, i am on vacation for last week.

    Yale Li 李耀先 said:
    When it is 0, transmission takes priority. Because this bit is related to the level-trigger signal. If the transfer continues, the level signal will always be triggered.

    Yes, you are right,

    If this bit is 0 means the ongoing transfers have higher priority than new trigger transfer but if this bit is 1 then the new trigger transfer have higher priority than ongoing transfer.

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    Thanks & regards,
    Jagadish.