This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMDS243EVM: PWM trip zone enable

Part Number: TMDS243EVM
Other Parts Discussed in Thread: SYSCONFIG

hi, 

i have try to enable the trip zone of the pwm but with no success.

in the config section i config this function:

EPWM_tzTriggerTripAction(epwmBaseAddr,
EPWM_TZ_TRIP_ACTION_TRI_STATE,
EPWM_OUTPUT_CH_A);
EPWM_tzTriggerTripAction(epwmBaseAddr,
EPWM_TZ_TRIP_ACTION_TRI_STATE,
EPWM_OUTPUT_CH_B);

and for the activation part this function:

EPWM_tzTripEventEnable(epwmBaseAddr,EPWM_TZ_EVENT_CYCLE_BY_CYCLE,CONFIG_GPIO0_PIN);

and toggle the IO

or this:

EPWM_tzTriggerSwEvent(epwmBaseAddr,EPWM_TZ_EVENT_CYCLE_BY_CYCLE);

on the sysconfig i have some problem, if i config the PWM like this:

it not link the TZ functionality, and if i using this configuration:

the PWM is not running at all.

i have got from TI response on this issue with this function: 

void SOC_allowEpwmTzReg(uint32_t epwmInstance, uint32_t enable)
{
/* Time base clock enable register belongs to partition 1 of the CTRL MMR */
uint32_t epwmPartition = 1;
/* Unlock CTLR_MMR0 registers */
SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, epwmPartition);

uint32_t regOffest = CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_EPWM0_CTRL_PROXY + (4 * epwmInstance);
if(TRUE == enable)
{
CSL_REG32_WR(regOffest,
((CSL_REG32_RD(regOffest) & 0x710U) | (0x1U << CSL_MAIN_CTRL_MMR_CFG0_EPWM0_CTRL_PROXY_EPWM0_CTRL_EALLOW_PROXY_SHIFT)));
}
else
{
CSL_REG32_WR(regOffest,
((CSL_REG32_RD(regOffest) & 0x710U) & ~(0x1U << CSL_MAIN_CTRL_MMR_CFG0_EPWM0_CTRL_PROXY_EPWM0_CTRL_EALLOW_PROXY_SHIFT)));
}
/* Lock CTRL_MMR0 registers */
SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, epwmPartition);
}

 

that need to wrap my trigger like this:

SOC_allowEpwmTzReg(epwmId,true);

EPWM_tzTriggerSwEvent(epwmBaseAddr,EPWM_TZ_EVENT_CYCLE_BY_CYCLE);

SOC_allowEpwmTzReg(epwmId,false);

but it did not helped.

can you pleas give me some direction for solve this problem?

thanks

Ofri

  • Hi Ofri,

      

    If you are selecting the EPWM instance from the Software tab, then Pinmux config is done automatically. But, If you are selecting it from the the Reserve Peripherals tab, then the Pinmux Configuration is not done automatically. 

    If Pinmux is not configured properly, then the PWM OUTPUTS, GPIO Inputs/Outputs, will not work as expected. Please Configure Pinmux before using EPWM outputs/ trip inputs.

    Thanks and regards,

    Madhava

  • hi Madhava,

    After some more testing i have successfully enable the trip zone!

    it was problem with the using of EPWM_tzTripEventEnable(epwmBaseAddr,EPWM_TZ_EVENT_CYCLE_BY_CYCLE,CONFIG_GPIO0_PIN);

    new i am try to reenable the PWM after setting and it seems that i cant set TZCLR register. (i have use the SOC_allowEpwmTzReg).

    can you think of any reason I can't write to this register

  • Hi Ofri,

    The Trip Zone registers are protected by EALLOW on AM243x. please use SOC_allowEpwmTzReg(epwmInstanceNumber, True); to enable writes to the trip zone space that includes TZCLR register. once the required writes are done, use SOC_allowEpwmTzReg(epwmInstanceNumber, Flase);  to lock registers writes. 

    SOC_allowEpwmTzReg(epwmId,true);

    EPWM_tzTriggerSwEvent(epwmBaseAddr,EPWM_TZ_EVENT_CYCLE_BY_CYCLE);

    SOC_allowEpwmTzReg(epwmId,false);

    the above wrapping is correct, but please make sure epwmId is correct EPWM Instance Number

    thanks and regards,

    Madhava

  • Hi Mihira, I discused with Ofri now:

    the above wrapping is correct, but please make sure epwmId is correct EPWM Instance Number

    he confirmed that the epwmid is correct EPWM instance number.

  • Hi Eyal,

    I am concerned as of why they would not be able to access the trip zone registers even after allowing the access. Could you help me gather what API, Args they are using for setting the TZCLR register? 

    thanks and regards,

    Madhava

  • Hi Eyal,

    Apologizes there is an error in the above func, SOC_allowEpwmTzReg(); please use the below one.

     

    void SOC_allowEpwmTzReg(uint32_t epwmInstance, uint32_t enable)
    {
        /* Time base clock enable register belongs to partition 1 of the CTRL MMR */
        uint32_t epwmPartition = 1;
        /* Unlock CTLR_MMR0 registers */
        SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, epwmPartition);
    
        uint32_t regOffest = CSL_MAIN_CTRL_MMR_CFG0_EPWM0_CTRL_PROXY + (CSL_MAIN_CTRL_MMR_CFG0_EPWM1_CTRL_PROXY - CSL_MAIN_CTRL_MMR_CFG0_EPWM0_CTRL_PROXY)*epwmInstance;
        if(TRUE == enable)
        {
            CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + regOffest,
                    ((CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE + regOffest) & 0x710U) | (0x1U << CSL_MAIN_CTRL_MMR_CFG0_EPWM0_CTRL_PROXY_EPWM0_CTRL_EALLOW_PROXY_SHIFT)));
        }
        else
        {
            CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + regOffest,
                    ((CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE + regOffest) & 0x710U) & ~(0x1U << CSL_MAIN_CTRL_MMR_CFG0_EPWM0_CTRL_PROXY_EPWM0_CTRL_EALLOW_PROXY_SHIFT)));
        }
        /* Lock CTRL_MMR0 registers */
        SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, epwmPartition);
    }
    

    sorry for the delayed response again.

    Madhava