TMS570LS1227: nTRST pin for TMS570LS1227

Hi Alessandro,

Alessandro Di Biasio said:

Hi, I would like to know what could happen if the U58 component were to inadvertently break causing its outputs to go to a high logic level. Does the TMS570LS1227 reset as the nTRST signal will become high?

It doesn't reset the entire SoC like nPORRST but it will reset the TAP (Test Access Port) of controller and puts the controller into the known state.

But as this is a active low signal(nTRST), a low level on this signal will reset the TAP of controller, not logic high.

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Thanks & regards,
Jagadish.

Hi Jagadish,

thanks for the reply, but at this point after understanding that only the controller TAP is reset, I don't understand if you are telling me that the pull down I inserted before the U58 buffer is correct or not. I read that when nTRST is 0 you are in functional mode, while when nTRST is 1 you are in TEST/DEBUG. Ultimately I am sure that the nTRST signal must be in pull down.

Thanks 

Alessandro

Hi Alessandro,

You are right about nTRST, it should be pull-down only.

(+) TMS570LS3137: TMS570LS3137 JTAG Connection fails - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

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Thanks & regards,
Jagdish.