TMS570LC4357: RTI0 interrupt not working after booting from bootloader.

sachin patel

Part Number: TMS570LC4357

I am trying to flash my application from bootloader and after flashing application I jump into application.
After jumping to application all things are working but RTI0 interrupt is not working.

On first reset I got RTI0 interrupt but reset it gain it not works for me.

My bootloader Linker file snap.
VECTORS (X) : origin=0x00000000 length=0x00000020 vfill = 0xffffffff
FLASH0 (RX) : origin=0x00000020 length=0x0003FFFF - 0x00000020 vfill = 0xffffffff
FLASH1 (RX) : origin=0x00040000 length=0x003FFFFF - 0x00040000 vfill = 0xffffffff
STACKS (RW) : origin=0x08000000 length=0x00002500
RAM (RW) : origin=0x08002500 length=0x0007db00
/* Bank 0 ECC */
ECC_VEC (R) : origin=(0xf0400000 + (start(VECTORS) >> 3))
length=(size(VECTORS) >> 3)
ECC={algorithm=algoL2R5F021, input_range=VECTORS}

ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0) >> 3))
length=(size(FLASH0) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH0 }

/* Bank 1 ECC */
ECC_FLA1 (R) : origin=(0xf0400000 + (start(FLASH1) >> 3))
length=(size(FLASH1) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH1 }

My application linker file snap.

VECTORS (X) : origin=0x00040020 length=0x00000020 vfill = 0xffffffff
FLASH0 (RX) : origin=0x00040040 length=0x000BFFFF-0x00040040 vfill = 0xffffffff
FLASH1 (RX) : origin=0x000C0000 length=0x003FFFFF-0x000C0000 vfill = 0xffffffff
STACKS (RW) : origin=0x08000000 length=0x00002500
RAM (RW) : origin=0x08002500 length=0x0007db00

/* Bank 0 ECC */
ECC_VEC (R) : origin=(0xf0400000 + (start(VECTORS) >> 3))
length=(size(VECTORS) >> 3)
ECC={algorithm=algoL2R5F021, input_range=VECTORS}

ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0) >> 3))
length=(size(FLASH0) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH0 }

/* Bank 1 ECC */
ECC_FLA1 (R) : origin=(0xf0400000 + (start(FLASH1) >> 3))
length=(size(FLASH1) >> 3)
ECC={algorithm=algoL2R5F021, input_range=FLASH1 }

Thannks

over 1 year ago

0 jagadish gundavarapu over 1 year ago

TI__Guru 69891 points

Hi Sachin,

I am suspecting one reason for not working interrupts:

(+) RM57L843: UART_Bootlader_RM57 Questions - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

In above thread please refer the below comment:

--
Thanks & regards,
Jagadish.

0 sachin patel over 1 year ago in reply to jagadish gundavarapu

Prodigy 20 points

Hi Jagdish

Thanks for your response.

My project has a multi-stage bootloader(First_stage_bootloader -> Second_stage bootloader -> Application). So the things you suggested I tried it and it works only in the second_stage bootloader and that does not work in the application stage.

Here I attached linker files for all this project.

Fullscreen First_stage_HL_sys_link.cmd.txt Download

/*----------------------------------------------------------------------------*/
/* sys_link.cmd                                                               */
/*                                                                            */
/* 
* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com  
* 
* 
*  Redistribution and use in source and binary forms, with or without 
*  modification, are permitted provided that the following conditions 
*  are met:
*
*    Redistributions of source code must retain the above copyright 
*    notice, this list of conditions and the following disclaimer.
*
*    Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the 
*    documentation and/or other materials provided with the   
*    distribution.
*
*    Neither the name of Texas Instruments Incorporated nor the names of
*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
*  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
*  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/

/*                                                                            */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN (0) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Linker Settings                                                            */

--retain="*(.intvecs)"

/* USER CODE BEGIN (1) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
/* USER CODE BEGIN (2) */
#if 0
/* USER CODE END */
    VECTORS (X)  : origin=0x00000000 length=0x00000020
    FLASH0  (RX) : origin=0x00000020 length=0x001FFFE0
    FLASH1  (RX) : origin=0x00200000 length=0x00200000
    STACKS  (RW) : origin=0x08000000 length=0x00002500
    RAM     (RW) : origin=0x08002500 length=0x0007db00

/* USER CODE BEGIN (3) */
#endif

#if 1
  /* VECTORS (X)  : origin=0x00000000 length=0x00000020 vfill = 0xffffffff
    FLASH0  (RX) : origin=0x00000020 length=0x000FFFE0 vfill = 0xffffffff
    FLASH1  (RX) : origin=0x00100000 length=0x002FFFFF vfill = 0xffffffff
    STACKS  (RW) : origin=0x08000000 length=0x00002500
    RAM     (RW) : origin=0x08002500 length=0x0007db00
    */


    VECTORS (X)  : origin=0x00000000 length=0x00000020 vfill = 0xffffffff
    FLASH0  (RX) : origin=0x00000020 length=0x0003FFFF - 0x00000020 vfill = 0xffffffff
    FLASH1  (RX) : origin=0x00040000 length=0x003FFFFF - 0x00040000 vfill = 0xffffffff
    STACKS  (RW) : origin=0x08000000 length=0x00002500
    RAM     (RW) : origin=0x08002500 length=0x0007db00
/* Bank 0 ECC */
    ECC_VEC  (R) : origin=(0xf0400000 + (start(VECTORS) >> 3))
                   length=(size(VECTORS) >> 3)
                   ECC={algorithm=algoL2R5F021, input_range=VECTORS}

    ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0)  >> 3))
                   length=(size(FLASH0)  >> 3)
                   ECC={algorithm=algoL2R5F021, input_range=FLASH0 }

/* Bank 1 ECC */
    ECC_FLA1 (R) : origin=(0xf0400000 + (start(FLASH1)  >> 3))
                   length=(size(FLASH1)  >> 3)
                   ECC={algorithm=algoL2R5F021, input_range=FLASH1 }
#endif
/* USER CODE END */
}

/* USER CODE BEGIN (4) */
#if 1
ECC {
    algoL2R5F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */
                   hamming_mask = R4         /* Use R4/R5 build in Mask */
                   parity_mask  = 0x0c       /* Set which ECC bits are Even and Odd parity */
                   mirroring    = F021       /* RM57Lx and TMS570LCx are build in F021 */
}
#endif
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
/* USER CODE BEGIN (5) */
#if 0
/* USER CODE END */
    .intvecs : {} > VECTORS
    .text   align(32) : {} > FLASH0 | FLASH1
    .const  align(32) : {} > FLASH0 | FLASH1
    .cinit  align(32) : {} > FLASH0 | FLASH1
    .pinit  align(32) : {} > FLASH0 | FLASH1
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM
	
    FEE_TEXT_SECTION  : {} > FLASH0 | FLASH1
    FEE_CONST_SECTION : {} > FLASH0 | FLASH1
    FEE_DATA_SECTION  : {} > RAM

/* USER CODE BEGIN (6) */
#endif

#if 1
   .intvecs    : {} palign=8 > VECTORS
   flashAPI:
   {
      .\MCAL_Lib\source\Fapi_UserDefinedFunctions.obj (.text, .data)
      .\Boot\bl_flash.obj (.text, .data)
      --library = F021_API_CortexR4_BE_L2FMC.lib (.text, .data)
   } palign=8 load = FLASH0, run = RAM, LOAD_START(apiLoadStart), RUN_START(apiRunStart), SIZE(apiLoadSize)

   .text    : {} palign=8 > FLASH0 /*Initialized executable code and constants*/
   .const   : {} palign=8 > FLASH0 /* , run = RAM, LOAD_START(constLoadStart), RUN_START(constRunStart), SIZE(constLoadSize)*/   /*Initialized constant data (e.g. const flash_sectors[..] = )*/
   .cinit   : {} palign=8 > FLASH0 /* Tables for explicitly initialized global and static variables */
   .pinit   : {} palign=8 > FLASH0 /* C++ global constructor addresses */

   .bss     : {} > RAM    /* Uninitialized global and static variables */
   .data    : {} > RAM    /* Global and static non-const variables that are explicitly initialized. */
   .sysmem  : {} > RAM    /* Memory pool (heap) for dynamic memory allocation */

    FEE_TEXT_SECTION  : {} > FLASH0
    FEE_CONST_SECTION : {} > FLASH0
    FEE_DATA_SECTION  : {} > RAM
#endif




/* USER CODE END */
}

/* USER CODE BEGIN (7) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Misc                                                                       */

/* USER CODE BEGIN (8) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/

Fullscreen Application_HL_sys_link.cmd.txt Download

/*----------------------------------------------------------------------------*/
/* sys_link.cmd                                                               */
/*                                                                            */
/* 
* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com  
* 
* 
*  Redistribution and use in source and binary forms, with or without 
*  modification, are permitted provided that the following conditions 
*  are met:
*
*    Redistributions of source code must retain the above copyright 
*    notice, this list of conditions and the following disclaimer.
*
*    Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the 
*    documentation and/or other materials provided with the   
*    distribution.
*
*    Neither the name of Texas Instruments Incorporated nor the names of
*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
*  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
*  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/

/*                                                                            */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN (0) */
#include "BMS_Config.h"
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Linker Settings                                                            */

--retain="*(.intvecs)"

/* USER CODE BEGIN (1) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
/* USER CODE BEGIN (2) */
#if	BOOTLOADER_ENABLE == 0
/* USER CODE END */
    VECTORS (X)  : origin=0x00000000 length=0x00000020
    FLASH0  (RX) : origin=0x00000020 length=0x001FFFE0
    FLASH1  (RX) : origin=0x00200000 length=0x00200000
    STACKS  (RW) : origin=0x08000000 length=0x00002500
    RAM     (RW) : origin=0x08002500 length=0x0007db00

/* USER CODE BEGIN (3) */
#else
    VECTORS (X)  : origin=0x00100000 length=0x00000020
    FLASH0  (RX) : origin=0x00000000 length=0x00100000
    FLASH1  (RX) : origin=0x00100020 length=0x003FFFFF-0x00100020 /*vfill = 0xffffffff*/
    STACKS  (RW) : origin=0x08000000 length=0x00002500
    RAM     (RW) : origin=0x08002500 length=0x0007db00
#endif

/* USER CODE END */
}

/* USER CODE BEGIN (4) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
/* USER CODE BEGIN (5) */
#if	BOOTLOADER_ENABLE == 0
/* USER CODE END */
    .intvecs : {} > VECTORS
    .text   align(32) : {} > FLASH0 | FLASH1
    .const  align(32) : {} > FLASH0 | FLASH1
    .cinit  align(32) : {} > FLASH0 | FLASH1
    .pinit  align(32) : {} > FLASH0 | FLASH1
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM
	
    FEE_TEXT_SECTION  : {} > FLASH0 | FLASH1
    FEE_CONST_SECTION : {} > FLASH0 | FLASH1
    FEE_DATA_SECTION  : {} > RAM

/* USER CODE BEGIN (6) */
#else

    .intvecs : {} > VECTORS
    .text   : {} > FLASH1
    .const  : {} > FLASH1
    .cinit  : {} > FLASH1
    .pinit  : {} > FLASH1
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM

    FEE_TEXT_SECTION  : {} > FLASH1
    FEE_CONST_SECTION : {} > FLASH1
    FEE_DATA_SECTION  : {} > RAM
#endif





/* USER CODE END */
}

/* USER CODE BEGIN (7) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Misc                                                                       */

/* USER CODE BEGIN (8) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/

Fullscreen Second_stage_HL_sys_link.cmd.txt Download

/*----------------------------------------------------------------------------*/
/* sys_link.cmd                                                               */
/*                                                                            */
/* 
* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com  
* 
* 
*  Redistribution and use in source and binary forms, with or without 
*  modification, are permitted provided that the following conditions 
*  are met:
*
*    Redistributions of source code must retain the above copyright 
*    notice, this list of conditions and the following disclaimer.
*
*    Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the 
*    documentation and/or other materials provided with the   
*    distribution.
*
*    Neither the name of Texas Instruments Incorporated nor the names of
*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
*  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
*  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/

/*                                                                            */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN (0) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Linker Settings                                                            */

--retain="*(.intvecs)"

/* USER CODE BEGIN (1) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
/* USER CODE BEGIN (2) */
#if 0
/* USER CODE END */
    VECTORS (X)  : origin=0x00000000 length=0x00000020
    FLASH0  (RX) : origin=0x00000020 length=0x001FFFE0
    FLASH1  (RX) : origin=0x00200000 length=0x00200000
    STACKS  (RW) : origin=0x08000000 length=0x00002500
    RAM     (RW) : origin=0x08002500 length=0x0007db00

/* USER CODE BEGIN (3) */
#endif

#if 1
   /* VECTORS (X)  : origin=0x00000000 length=0x00000020 vfill = 0xffffffff
    FLASH0  (RX) : origin=0x00000020 length=0x000FFFE0 vfill = 0xffffffff
    FLASH1  (RX) : origin=0x00100000 length=0x002FFFFF vfill = 0xffffffff
    STACKS  (RW) : origin=0x08000000 length=0x00002500
    RAM     (RW) : origin=0x08002500 length=0x0007db00
    */

    /*VECTORS (X)  : origin=0x00100020 length=0x00000020
    FLASH0  (RX) : origin=0x00100040 length=0x001BFFFF-0x00100040
    FLASH1  (RX) : origin=0x001C0000 length=0x003FFFFF-0x001C0000
    STACKS  (RW) : origin=0x08000000 length=0x00002500
    RAM     (RW) : origin=0x08002500 length=0x0007db00
    */

    VECTORS (X)  : origin=0x00040000 length=0x00000020 vfill = 0xffffffff
    FLASH0  (RX) : origin=0x00040020 length=0x000BFFFF-0x00040020 vfill = 0xffffffff
    FLASH1  (RX) : origin=0x000C0000 length=0x003FFFFF-0x000C0000 vfill = 0xffffffff
    STACKS  (RW) : origin=0x08000000 length=0x00002500
    RAM     (RW) : origin=0x08002500 length=0x0007db00


	/*VECTORS (X)  : origin=0x00100020 length=0x00000020
    FLASH0  (RX) : origin=0x00000000 length=0x00100000
    FLASH1  (RX) : origin=0x00100040 length=0x003FFFFF-0x00100040
    STACKS  (RW) : origin=0x08000000 length=0x00002500
    RAM     (RW) : origin=0x08002500 length=0x0007db00*/

    /*VECTORS (X)  : origin=0x00040020 length=0x00000020
    FLASH0  (RX) : origin=0x00000000 length=0x00040000
    FLASH1  (RX) : origin=0x00040040 length=0x003FFFFF-0x00040040
    STACKS  (RW) : origin=0x08000000 length=0x00002500
    RAM     (RW) : origin=0x08002500 length=0x0007db00*/

/* Bank 0 ECC */
    ECC_VEC  (R) : origin=(0xf0400000 + (start(VECTORS) >> 3))
                   length=(size(VECTORS) >> 3)
                   ECC={algorithm=algoL2R5F021, input_range=VECTORS}

    ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0)  >> 3))
                   length=(size(FLASH0)  >> 3)
                   ECC={algorithm=algoL2R5F021, input_range=FLASH0 }

/* Bank 1 ECC */
    ECC_FLA1 (R) : origin=(0xf0400000 + (start(FLASH1)  >> 3))
                   length=(size(FLASH1)  >> 3)
                   ECC={algorithm=algoL2R5F021, input_range=FLASH1 }
#endif
/* USER CODE END */
}

/* USER CODE BEGIN (4) */
#if 1
ECC {
    algoL2R5F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */
                   hamming_mask = R4         /* Use R4/R5 build in Mask */
                   parity_mask  = 0x0c       /* Set which ECC bits are Even and Odd parity */
                   mirroring    = F021       /* RM57Lx and TMS570LCx are build in F021 */
}
#endif
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
/* USER CODE BEGIN (5) */
#if 0
/* USER CODE END */
    .intvecs : {} > VECTORS
    .text   align(32) : {} > FLASH0 | FLASH1
    .const  align(32) : {} > FLASH0 | FLASH1
    .cinit  align(32) : {} > FLASH0 | FLASH1
    .pinit  align(32) : {} > FLASH0 | FLASH1
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM
	
    FEE_TEXT_SECTION  : {} > FLASH0 | FLASH1
    FEE_CONST_SECTION : {} > FLASH0 | FLASH1
    FEE_DATA_SECTION  : {} > RAM

/* USER CODE BEGIN (6) */
#endif

#if 1
   .intvecs    : {} palign=8 > VECTORS
   flashAPI:
   {
      .\MCAL_Lib\source\Fapi_UserDefinedFunctions.obj (.text, .data)
      .\Boot\bl_flash.obj (.text, .data)
      --library = F021_API_CortexR4_BE_L2FMC.lib (.text, .data)
   } palign=8 load = FLASH0, run = RAM, LOAD_START(apiLoadStart), RUN_START(apiRunStart), SIZE(apiLoadSize)

   .text    : {} palign=8 > FLASH0 /*Initialized executable code and constants*/
   .const   : {} palign=8 > FLASH0 /* , run = RAM, LOAD_START(constLoadStart), RUN_START(constRunStart), SIZE(constLoadSize)*/   /*Initialized constant data (e.g. const flash_sectors[..] = )*/
   .cinit   : {} palign=8 > FLASH0 /* Tables for explicitly initialized global and static variables */
   .pinit   : {} palign=8 > FLASH0 /* C++ global constructor addresses */

   .bss     : {} > RAM    /* Uninitialized global and static variables */
   .data    : {} > RAM    /* Global and static non-const variables that are explicitly initialized. */
   .sysmem  : {} > RAM    /* Memory pool (heap) for dynamic memory allocation */

    FEE_TEXT_SECTION  : {} > FLASH0
    FEE_CONST_SECTION : {} > FLASH0
    FEE_DATA_SECTION  : {} > RAM
#endif




/* USER CODE END */
}

/* USER CODE BEGIN (7) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Misc                                                                       */

/* USER CODE BEGIN (8) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/

0 jagadish gundavarapu over 1 year ago in reply to sachin patel

TI__Guru 69891 points

Hi Sachin,

I couldn't find any issues with the linker scripts,

Is it possible for you to share any simplest project with the issue you are facing. That would be helpful for me to debug the issue in practical.

You can also send project over private chat window as well.

--
Thanks & regards,
Jagadish.