This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSPM0G3507: Extracting phase domain response using the PLL with BPSK signal input

Part Number: MSPM0G3507


Hello,

I am trying to use the MSPM0G3507's embedded PLL with a digital BPSK modulated signal input and am hoping to obtain the phase domain response (which should be in binary) as the PLL's output. However, looking at both the datasheet and user's guide, it doesn't appear that SYSPLL takes in any input other than a clock input as shown from page 112 from the user's guide below:

Is there any way to input a BPSK signal rather than a clock for this PLL to obtain the phase domain response of that signal? If this is possible do implement, if someone could give a code example of this or point to another reference that does implement this, that would be greatly appreciated.

Thank you!

  • Can you tell me what is BPSK signal like? Sorry, I don't know about it.

    Can you also tell me what you want to do?

    Can you check whether this trace can give you any help?

  • Hello,

    Here is an image of a BPSK signal:

    When the phase changes in the sinusoid, the binary signal will indicate a change as you can see above. So to switch from 0 to 1 for example, the phase will change but if you have something like 0 0, the phase will not change between the two. Hopefully, that makes sense.

    We are building a transceiver module to a small hobby satellite and need to extract information from an antenna. Basically, we are making an SDR from scratch.

    Unfortunately, that trace does not help as we need something other than a clock signal inputted to the PLL. We need the input to the PLL to be the BPSK signal (b - in the image above) which has been converted in the ADC convertor. The output will be the digital signal (a - in the image). Is the SYSPLL the same as a normal PLL? Can I implement this?

  • While SYSPLL is a "normal" PLL, it is hardwired to act as a frequency multiplier to generate clock frequencies, I don't believe you can use it as a general purpose PLL.

  • Ugg, okay. That is unfortunate. Thank you for your help though.

  • She wants to feed her BPSK modulated signal into the the PLL in order to get the baseband BPSK out.