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AM2431: Connection error with XDS110 (Error code : -6305)

Part Number: AM2431
Other Parts Discussed in Thread: LP-AM243

XDS110 emulator and am2431(on my custom board) are connected (JTAG Connect Pin : TMS, TCK, TDO, TDI, TRST, GND).

The log after "test connection" is as follows.

--------------------------------------------------------------------------------

[Start: Texas Instruments XDS110 USB Debug Probe_0]

Execute the command:

%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity

[Result]


-----[Print the board config pathname(s)]------------------------------------

C:\Users\tjdck\AppData\Local\TEXASI~1\CCS\
ccs1240\0\0\BrdDat\testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 100/110/510 class product.
This utility will load the adapter 'jioxds110.dll'.
The library build date was 'Jun 2 2023'.
The library build time was '12:47:07'.
The library package version is '9.12.0.00150'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '5' (0x00000005).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the XDS110 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for XDS110 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).

-----[Perform the Integrity scan-test on the JTAG IR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG IR Integrity scan-test has succeeded.

-----[Perform the Integrity scan-test on the JTAG DR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG DR Integrity scan-test has succeeded.

[End: Texas Instruments XDS110 USB Debug Probe_0]

--------------------------------------------------------------------------------

And as you can see in the figure below, CS_DAP_0 is connected, but MAIN_Cortex_R5_0_0 is not.

When attempting to connect with MAIN_Cortex_R5_0_0, the error log is as follows.

--------------------------------------------------------------------------------

MAIN_Cortex_R5_0_0: Error connecting to the target: (Error -6305) PRSC module failed to write to a router register. (Emulation package 9.12.0.00150)

--------------------------------------------------------------------------------

When I looked at a few articles from years ago that had similar symptoms in the forum,

there were a lot of hyperlinks that were offered, but those links were not valid.

What can I do to solve this problem?

  • Hello Seong,

    Can you confirm the silicon revision of your SoC?

    Can you please confirm that you are booting using an HS_FS image? 

    If your SoC is SR 2.0 and the image that you are booting with is not an HS_FS image, then what you are observing is the expected behavior. 

    For more information on the HS_FS devices, refer to https://software-dl.ti.com/mcu-plus-sdk/esd/AM243X/09_01_00_41/exports/docs/api_guide_am243x/HSFS_MIGRATION_GUIDE.html 

    Regards,

    Erik

  • Hello Erik,

    My SoC on custom board is AM2431'B'SDGHIALV that is SR 2.0 version.

    But, R5F(the single core of AM2431) and XDS110 are not connected, so no attempt is possible.

    And When booting as Uart Boot Mode, I can't get 'C' character in uart terminal.

    (Not only in Main UART0, but also in XDS110 Class Application/User UART)

    (I refered to this URL : https://software-dl.ti.com/mcu-plus-sdk/esd/AM243X/latest/exports/docs/api_guide_am243x/EVM_SETUP_PAGE.html#autotoc_md32)

    The signal levels of the pins associated with the reset are as follows.

    1. MCU_SAFETY_ERRORn - 0V (Low : It indicates the MCU ESM module has registered an error.)

    2. MCU_RESETSTATz - 0V (Low : It indicates that the MCU and MAIN domains are in warm reset state.)

    3. MAIN_RESETSTATz - 0V (Low : It indicates that the MAIN domain is in a warm reset state.)

    4. MAIN_PORz_OUT - 3.3V (High : It indicates the MAIN domain is out of the POR state.)

    What should I do?

  • Hello Seong,

    And When booting as Uart Boot Mode, I can't get 'C' character in uart terminal.

    is the terminal outputting anything or is it blank?

    Can you please detail the Bootmode settings that you have configured? A screenshot of the schematic would be helpful for review. 

    The signal levels of the pins associated with the reset are as follows.

    The expected values should be

    1. MCU_SAFETY_ERRORn - 1.8V 
    2. MCU_RESETSTATz - 3.3V 
    3. MAIN_RESETSTATz - 3.3V 
    4. MAIN_PORz_OUT - 3.3V 

    However, when MCU_RESETz is LOW then you would observe the same values that you are seeing. Can you confirm the value of MCU_RESETz (A5)?

    Regards,

    Erik

  • 1. There is no terminal output at UART Boot mode.

    2. Boot Mode [0:2] = 1 1 0 (PLL Ref Clock : 25MHz, Default)

        Boot Mode [3:9] = 1 1 1 0 0 0 0 (does not connect to XDS110 whatever boot mode)

        Boot Mode [10:15] = 0

    3. MCU_RESETz is HIGH(3.3V)

        In addition, all other input reset signals(MCU_PORz, MAIN_RESETz_REQ) are High.

  • Hello Seong,

    Could you please tell me what you observe on SYCLKOUT0, MCU_SYSCLKOUT0, CLKOUT0, OBSCLK0, and MCU_OBSCLK0?

    Also, can you confirm that you are following the power sequecing requirements as detailed in the AM243x Datasheet?

    Could you please provide oscilloscope shots of the power up sequencing? Please include 3.3V, 1.8V, core, and PORz in the scope shots. Please also provide a scope shot of the MCU_OSC0 in relation to PORz. 

    What is your clock source? 

    Could you provide the schematic for reference and review? 

    Regards,

    Erik 

  • I think this problem occurred because I removed the TPS386000RGPR chip related to the MCU_PORZ signal. Now that I attach this chip right away, R5F is connected normally in CCS.

    But there are still questions.
    Even without TPS386000RGPR (custom circuit referring to LP-AM243), MCU_PORz signal was High, why was it not connected with R5F?
    The only difference between before and after connection is whether or not that chip(TPS386000RGPR) is attached.

  • Hello Seong,

    The TPS386000RGPR is a voltage monitor which is used on the LP-AM243x to make sure that PORz is following the power up sequencing requirements. For more information on the requirements, please refer to the power up sequencing section of the device datasheet. If TPS386000RGPR is removed then the pull up resistor will leave MCU_PORz high. This is not recommended.  By having PORz high via pull to 1.8V, the power up sequencing requirements are not being met (PORz will be high before all power rails are high). With the TPS386000RGPR, PORz will go high after VDD Core is brought up. Please let me know if you have any additional questions or concerns.

    Regards,

    Erik

  • Hello Erik,

    Thank you.