AM263P4: EPWM Clock Gating

Sudhakar Elumalai Dhanasekar

Part Number: AM263P4

I don't find separate clock gate register for each EPWM channel in TRM under section 6.4.3.4 Clock Selection.

But in the API reference they provided the function void SOC_gateEpwmClock(uint32_t epwmInstance), which is used to Gate the ePWM clock for each instance by passing input parameter.

Similar for other peripheral as well. Like ECAP, EQEP, DAC, ADC, etc.

I'm bit confused here.

over 2 years ago

+1 Sahana H G over 2 years ago

TI__Expert 7856 points

Hello,

6.4.3.4 Clock Selection lists only the clocks present in the MSS_RCM and TOP_RCM space. The registers to clock gate ePWM, ECAP, EQEP, DAC, ADC, etc. are present in the CONTROLSS space which can be found in the register addendum in the GLOBAL_CTRL section. Hope this helps.

Thanks and Regards,

Sahana

0 Sudhakar Elumalai Dhanasekar over 2 years ago in reply to Sahana H G

Prodigy 195 points

Hello Sahana,

For each IP's I can able to see the block diagram of clock gate in the TRM under section 6.4.3.3 IP Clocks working on SYS_CLK, but for each module like EPWM, ECAP, EQEP, DAC, ADC, etc, where can I find the similar block diagram, for example which part of the EPWM module gate is connected ?

+1 Daniel Bermudez over 2 years ago in reply to Sudhakar Elumalai Dhanasekar

TI__Genius 9710 points

Hello,

All the IP's you mentioned are IP's working on SYS_CLK, which mean they don't have a dedicated GCM. Figure 6-24. Generic IP clocking with SYS_CLK is the applicable block diagram for the EPWM clock gating.

Best,

Daniel

0 Sudhakar Elumalai Dhanasekar over 2 years ago in reply to Daniel Bermudez

Prodigy 195 points

Hello Daniel,

If the EPWM, ECAP, EQEP, DAC, ADC etc are working on SYS_CLK and they don't have a dedicated GCM(Global clock control module), then how we're controlling the clock gate of the individual module and individual channel.

For example, By writing 0x7 to ETPWM0_CLK_GATE, will gate the clock source for ETPWM0, Similarly ETPWM1_CLK_GATE for ETPWM1.
The same applicable for other module also like ECAPx_CLK_GATE, EQEPx_CLK_GATE, ADCx_CLK_GATE etc.

+1 Daniel Bermudez over 2 years ago in reply to Sudhakar Elumalai Dhanasekar

TI__Genius 9710 points

Hi Sudhakar,

Like Sahana said, this can be done with the registers in the Global Control section of the RA:

You will find the registers that will let you gate/ungate the clocks for the different control peripherals

Link to the RA, please download rather than opening in browser: www.ti.com/.../spruj57

Best,

Daniel

+1 Sahana H G over 2 years ago in reply to Sudhakar Elumalai Dhanasekar

TI__Expert 7856 points

Hello Sudhakar,

As mentioned in the TRM, the clock controls for the following are within the respective IPs, and hence not part of the Global clock control module.

Regards,

Sahana

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AM263P4: EPWM Clock Gating