TMS570LC4357: DMA EMIF

su do

Part Number: TMS570LC4357

I have some questions related to TMS570LC4357 and its interfaces and how to use e.g. DMA in the CPU or DMA in an external device together with EMIF.

What memories attached to the CPU can be access and used by the DMA to transfer data (read, write) to a EMIFcs_n[4] slave? Is it possible to use eg GIOB from external device to trigger DMA

to read from slave EMIF into CPU memory and another GIOB to write from CPU memory to EMIF slave?

Are there any example designs or tutorials that shows how DMA in CPU can be used to transfer data between the memories connected to the CPU (internal or external SPI or EMIF memory) towards an EMIF device?

Also is it possible to have "normal" EMIF cs_n[4] function without DMA with one specified timing and another timing when its switching to use DMA with cs_n[4]?

The EMIF slave could be an 1000Mbit/s ethernet mac with tx, rx fifo that needs to be serviced by the CPU at cs_n[4] together with "normal" bus accesses for other functions also with EMIF cs_n[4]. The CPU may also use EMIF cs_n[2,3] memories for different purpose and a flash with spi interface. What are the recommended approach for this setup?

Thanks

over 1 year ago

0 jagadish gundavarapu over 1 year ago

TI__Guru 71221 points

Hi Su do,

su do said:
What memories attached to the CPU can be access and used by the DMA to transfer data (read, write) to a EMIFcs_n[4] slave? Is it possible to use eg GIOB from external device to trigger DMA

You can use DMA for all the memories which can be interfaced with EMIF.

As mentioned in above highlighted line you can use DMA for SDRAM memory or any asynchronous memories that can be used for EMIF.

su do said:
to read from slave EMIF into CPU memory and another GIOB to write from CPU memory to EMIF slave?

Yes, you can use GIOB to trigger the DMA transfer of EMIF.

You can configure the above highlighted GIO hardware request transfers for DMA.

su do said:
Are there any example designs or tutorials that shows how DMA in CPU can be used to transfer data between the memories connected to the CPU (internal or external SPI or EMIF memory) towards an EMIF device?

Unfortunately, we don't have any tested examples with DMA.

But i will suggest you refer below threads to refer so that you can do it on your own.

(+) CCS/RM57L843: DMA access for EMIF async interface - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

(+) TMS570LC4357: How to read and write data from nvsram using the emif interface via DMA - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

(+) TMS570LC4357: Transferring data from shared RAM to EMIF via DMA - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

su do said:
Also is it possible to have "normal" EMIF cs_n[4] function without DMA with one specified timing and another timing when its switching to use DMA with cs_n[4]?

It can be possible but have to test it in practical.

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Thanks & regards,
Jagadish.